MSAN-107 Zarlink Semiconductor, Inc., MSAN-107 Datasheet - Page 9

• Manufacturer Part Number: MSAN-107
• Description: Understanding and Eliminating Latch-Up in CMOS Applications
• Manufacturer: Zarlink Semiconductor, Inc.

Application Note
If a current-limiting resistor cannot be used due to
constraints on output drive, speed or noise immunity,
then the alternative is to connect a zener diode
between V
across the device (Fig. 12b).
resistor may still be necessary, but its value can be
very small, limited only by the power handling
capacity of the zener diode.
There is one last potential hazard that can develop
due to “live” insertion of PCB’s. On boards with little
local decoupling, plugging the card in can result in
an extremely fast transient on the power supply
leads of devices on the board.
could theoretically result in triggering latch-up due to
the dV/dt effect described earlier. This problem can
be avoided by decoupling the power supply on the
board with sufficiently large capacitors to slow down
the power supply ramp up when the board is plugged
in.
compatible with the overall decoupling scheme to
prevent the over-voltage problem just described.
Similar transients on the power supply can be
generated due to switching of high speed, high
current devices such as ECL and Schottky TTL
circuits driving heavy DC current loads. Also, back
EMF generated by opening of inductive loads such
as realys can induce nasty voltage spikes. Adequate
high frequency decoupling will usually remedy the
problem.
connected as close to the device as possible across
the power supply pins will shunt most of this high
frequency energy to ground (Fig. 13). Connection of
flyback diodes around inductive loads is also
recommended to limit back EMF surges.
Power Supply
These capacitors must be chosen to be
Power Supply
A) SERIES PROTECTION RESISTOR
Ground
V
DD
DD
A 0.01 to 0.1 F ceramic capacitor
and V
CMOS Device
R
SS
to prevent over-voltages
Figure 12 - Power Supply Over-Voltage Protection
V
SS
R
A current-limiting
These transients
V
DD
Power Supply
Problems Associated with Multi-Power Supply
Voltages and Associated Decoupling Circuitry
In systems that have more than one independent
power supply, care must be taken to ensure correct
sequencing
cycles. This is required to prevent input and output
over-voltage conditions from developing. Consider,
for example, a device powered from a +5V supply
that has its outputs connected to a device powered
from a +7V supply. Under steady state conditions,
the output levels from the 5V devices would lie well
within the supply voltage of the 7V device. However,
if during power-up the 5V supply was to exceed the
7V supply, then the output voltage of the 5V device
could exceed the instantaneous supply voltage of the
7V device (Fig. 14). This over-voltage could cause
the 7V device to latch-up. A similar situation can
occur between two devices powered by separate
supplies of equal magnitude such as 5V regulated
and 5V unregulated supplies. In this case there is
the added concern when three-state outputs are tied
together.
over-voltage triggering of latch-up.
present a high impedance only to signals lying within
the power supply voltages. It must be stressed that
Fig. 13-High Frequency Power Supply Decoupling
Power Supply
Power Supply
Power Supply
Ground
connect as close to
device as possible
V
DD
Ground
V
B) ZENER DIODE RESISTOR
These outputs are also subject to
DD
0.1 to 0.01 F
V
during
Z
(Ceramic)
power-up
C
V
SS
V
SS
V
MSAN-107
DD
and
V
CMOS Device
DD
Such outputs
power-down
CMOS
Device
A-39