PM8621 PMC-Sierra, Inc., PM8621 Datasheet
PM8621
Related parts for PM8621
PM8621 Summary of contents
Page 1
... Narrowband Switch Element Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC- PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet PM8621 NSE-8G Data Sheet Preliminary Issue 1: May, 2001 Preliminary ...
Page 2
... PMC-Sierra, Inc the sufficiency, fitness or suitability for a particular purpose of any such information or the fitness, or suitability for a particular purpose, merchantability, performance, compatibility with other parts or systems, of any of the products of PMC-Sierra, Inc., or any portion thereof, referred to in this document. PMC-Sierra, Inc. expressly disclaims all ...
Page 3
... Tel: (604) 415-6000 Fax: (604) 415-6200 Document Information: document@pmc-sierra.com Corporate Information: info@pmc-sierra.com Technical Support: apps@pmc-sierra.com Web Site: http://www.pmc-sierra.com Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Preliminary 2 ...
Page 4
... DS0 Cross Bar switch (DCB) ............................................................................49 9.5 Clock Synthesis and Transmit Reference Digital Wrapper (CSTR)..................50 9.6 Fabric Latency...................................................................................................50 9.7 JTAG Support....................................................................................................50 9.8 Microprocessor Interface ..................................................................................50 9.9 In-band Link Controller (ILC).............................................................................51 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Preliminary 3 ...
Page 5
... Accessing the Transmit Message FIFO .............................................149 12.12.2 Accessing the Receive Message FIFO ..............................................150 12.12.3 Handling the Transmit Header ...........................................................153 12.12.4 Handling the Receive Header ............................................................154 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Preliminary ...
Page 6
... JTAG Port Interface.........................................................................................178 18 Ordering and Thermal Information ..........................................................................180 18.1 Packaging Information ....................................................................................180 18.2 Thermal Information ........................................................................................180 19 Mechanical Information ...........................................................................................182 Notes ...............................................................................................................................183 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Preliminary 5 ...
Page 7
... Register 047H: DCB Access Mode Register .....................................................................88 Register 048H: DCB C1 delay (RC1DLY) register. ..........................................................91 Register 04AH: DCB Frame size Register ........................................................................92 Register 04CH: DCB Configuration Register ....................................................................93 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Preliminary ...
Page 8
... Register 116h + N*20H, ILC Interrupt Enable and Control Register ...............................121 Register 117h + N*20H: ILC Interrupt Reason Register..................................................124 Register 800H: NSE-8G Master Test ..............................................................................126 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 9
... Figure 28 Example Graph .............................................................................................158 Figure 29 Time:Space:Time Switching in one NSE-8G and four Single-Ported SBSs .............................................................................................................158 Figure 30 Example Graph .............................................................................................160 Figure 31 Example Problem..........................................................................................161 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Preliminary 8 ...
Page 10
... Figure 40 Microprocessor Interface Write Timing .........................................................175 Figure 41 NSE-8G Input Timing ....................................................................................176 Figure 42 RSTB Timing.................................................................................................177 Figure 43 JTAG Port Interface Timing...........................................................................179 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Preliminary ...
Page 11
... Table 19 NSE-8G Input Timing (Figure 40) ..................................................................176 Table 20 RSTB Timing (Figure 41 ) ..............................................................................177 Table 21 Serial SBI Bus Interface .................................................................................178 Table 22 JTAG Port Interface ( Figure 42) ....................................................................178 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Preliminary ...
Page 12
... Requires dual power supplies at 1.8V and 3.3V. Packaged as a 480 ball UBGA. In conjunction with the SBS or SBS-lite, supports “1+1” and “1:N” fabric redundancy. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 13
... Applications The PM8621 Narrowband Switch Element 8G (NSE-8G) supports a variety of flexible Layer 1/Layer 2 architectures in combination with the following PMC-Sierra devices: PM8610 SBS and PM8611 SBS-lite (SBI Serializer and Memory switching stage). SBI bus devices (TEMUX™/TEMAP, FREEDM devices, S/UNI®-IMA devices, AAL1gator™ ...
Page 14
... IEEE Std 1596.3-1996, “IEEE Standard for Low-Voltage Differential Signals (LVDS) for Scalable Coherent Interface (SCI)”, Approved March 21, 1996 8. L.R. Ford, D.R. Fulkerson, “Flows in Networks'', Maximum Cardinality Matchings in Bipartite Graphs Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Preliminary ...
Page 15
... Figure 1 illustrates an OC-48 SONET Ring Add/Drop Multiplexer. The PM5363 TUPP-622 devices align all paths to transport frames in preparation for VT1.5/VT2 granularity switching. The PM8610 SBI336 Bus Serializer (SBS™) an PM8621 Narrowband Switching Element 8G (NSE-8G™) devices support VT1.5/VT2 and above switching. The Add and Drop buses are provided by the SBSs that are not in the SONET Ring path ...
Page 16
... SBSs. A likely packaging of this combined system would place the NSE-8G (and a standby NSE-8G) on separate fabric cards. In Figure 4, PM8315 TEMUXs align paths to transport frames. Note: Figure 3 assumes this alignment. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 SBS- ...
Page 17
... Figure 4 Any-Service-Any-Port DS0-Granularity PHY Card SPECTRA- 2488 SONET/T1/E1 Termination - VT/TU/DS0 Switching Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet 4 X TBS TEMUX- TBS TEMUX-84 TBS 4 X TBS ...
Page 18
... The switching instructions are stored in two pages of ram configured as offline and online allowing the user to modify the offline page. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 19
... NSE-8G and SBSs. This can be used to send messages between the NSE-8G microprocessor-and the SBS microprocessors in a user defined format. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 20
... Description The PM8621 NSE- monolithic CMOS integrated circuit packaged in a 480 ball UBGA that performs DS0 and above granularity space switching on 12 SBI336 streams carried as serial SBI336S in 8B/10B coding over LVDS at 777.6 Mbit/s. The NSE-8G also performs VT1.5/VT2 and above granularity switching on 12 STS-12/STM-4 SONET/SDH streams, carried as Serial TelecomBus signals in 8B/10B coding over LVDS at 777 ...
Page 21
... AVDL2 VSS NC NC VDDI AVDL4 AVDL3 AVDL5 CSU_AV DH Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue VSS NC VSS NC VSS Reserved VDDI VDDI Reserved Reserved NC ...
Page 22
... TCK TMS NC Reserved NC VDDI NC VDDI TDI NC RC1FP VDDI TRSTB VDDI VDDO Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet VSS Reserved VSS Reserved VSS VDDI ...
Page 23
... AM VSS AVDH VDDO VDDO CSB AN VSS VDDO VDDO VDDO INTB AP VSS VSS VSS VSS Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NC VDDI VDDO A[6] A[2] VDDI RDB VDDI A[9] A[5] A[3] D[31] WRB NC A[10] A[7] A[4] A[0] VSS A[11] VSS ...
Page 24
... VDDI D[15] VDDI D[10] D[9] D[7] D[16] D[14] D[12] NC VDDI D[6] NC VSS VDDI VSS VDDI VSS Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet D[5] D[3] D[0] VDDO D[2] D[ D[4] VDDI VSS NC VSS ...
Page 25
... RN[8] RP[9] RN[9] RP[10] RN[10] RP[11] RN[11] RP[12] RN[12] Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function J4 Receive Serial Data. The differential receive serial data links (RP[11:0]/RN[11:0]) carry the receive SBI336S or J3 SONET/SDH STS-12 frame data from upstream sources K3 in bit serial format ...
Page 26
... TP[11] TN[11] TP[12] TN[12] NSE-8G Control and Clocking (5 Balls) SYSCLK Input Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function F2 Transmit Serial Data. The differential transmit working serial data links (TP[11:0]/TN[11:0]) carry the transmit ...
Page 27
... Input Reserved Output CMP Input RSTB Input Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function D16 Receive Serial Interface Frame Pulse. The receive serial interface frame pulse signal (RC1FP) provides system timing for the receive serial interface ...
Page 28
... Microprocessor Interface (49 Balls) CSB Input RDB Input WRB Input Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function AM30 Chip Select Bar. The active low chip select signal (CSB) controls microprocessor access to registers in the NSE- 8G device ...
Page 29
... A[9] A[8] A[7] A[6] A[5] A[4] A[3] A[2] A[1] A{0] Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function AM24 Microprocessor Data Bus. The bi-directional data bus, AN23 D[31:0] is used during NSE-8G Microprocessor Interface AM23 Port register reads and write accesses. D[31] is the most ...
Page 30
... Input TDI Input TDO Tri-state TRSTB Input Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function AL30 Address Latch Enable. The address latch enable signal (ALE) is active high and latches the address bus (A[11:0]) when it is set low ...
Page 31
... Reserved Reserved Input External Resistors (4 Balls) RES[2] Analog Input RES[1] Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function C29 Reserved. Must be left floating [internally pulled up]. ...
Page 32
... ATB0[1] ATB1[2] Analog ATB1[1] Digital Core Power (45 Balls) VDDI[44:0] Power Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function AK1 Reference Resistor Connection. An off-chip 3.16 k ±1% resistor is connected between these the positive ...
Page 33
... Pad Name Type VDDI[44:0] Power Digital I/O Power (34 Balls) VDDO[33:0] Power Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function L4K4 H3 C5 B11 D11 D13C13 C15 D15 C18 ...
Page 34
... Pad Name Type VDDO[33:0] Power Digital Ground (72 Balls) VSS [71:0] Ground Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function B30 B31 B32 C31 D30 D27 D23 D19 ...
Page 35
... Pad Name Type VSS [71:0] Ground Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function AP1 AP2 AP3 AP4 AP6 AP8 AP10 AP12 AP14 AP16 AP21 AP23 AP25 ...
Page 36
... AVDL[7:0] Power Clock Synthesis 1.8 V Power (6 Balls) CSU_AVDL[5:0] Power Clock Synthesis Power (2 Balls) CSU_AVDH[0:1] Power Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function K34 M34 P34 W34 ...
Page 37
... Pad Name Type Analog I/O Power (34 Balls) AVDH[33:0] Power Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function H4 The analog I/O power pins (AVDH[33:0]) should be connected to a well-decoupled +3 supply. ...
Page 38
... Pad Name Type No Connect (50 Balls) NC[49:0] Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No. Function AG33 The No Connect pins (NC[49:0]) should be left floating. AP30 AL29 AN28 AP22 AN20 AL20 ...
Page 39
... Analog Power Filtering Recommendations To achieve best performance of the LVDS links, an analog filter network should be installed between the power balls and the supply. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Pin No ...
Page 40
... Two power-gnd pairs can use the same filter. Figure 7 Analog Power Filter Circuit Supply VDD R s Supply VSS Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Cl Ch Notes ...
Page 41
... Data is guaranteed to contain sufficient transition density to allow reliable operation of the data recovery units by 8B/10B block coding and decoding provided by the T8TE and R8TD blocks. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 42
... The resulting current is then mirrored through several individual reference current outputs, so each TXLV receives its own reference current. There is one instance of the TXREF in the NSE-8G. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 43
... FIFO at the link clock rate. Data is read from the FIFO at every SYSCLK cycle. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 44
... K28.7- 001111 1000 K29.7- 101110 1000 Fractional Rate Links K28.7- 001111 1000 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Curr. RD+ Encoded Signals abcdei fghj Description 110000 0101 IC1FP=’ ...
Page 45
... Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Curr ...
Page 46
... K28.7- 001111 1000 K28.7+ - K29.7- 101110 1000 K29.7+ - Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Curr. RD+ Encoded Signals abcdei fghj Description 110000 0101 IC1FP=’b1 IPL=’b0 ...
Page 47
... The special characters listed in Table 2 and Table 3 are ignored for LCV purposes. Upon return to in- character-alignment state the LCV count is cleared. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet REI are encoded in the V5 byte ...
Page 48
... Multiframe alignment is required so that a downstream device can extract the data from the tributary. The multiframe information is preserved by only sending out C1FP characters every four frames. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 49
... Figure 10 Frame Alignment State Machine out-of- frame- alignment Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 3 consecutive out-of-place C1FPs or out-of-character alignment Found C1FP and not (out-of-character alignment) NSE-8G™ ...
Page 50
... One page will be on-line translating ports in the core switch while the other is offline for CPU update. When the new configuration is ready, and the appropriate system synchronized frame boundary arrives, the pages will be swapped. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 51
... Register Memory Map table below. Addresses that are not shown are not used and must be treated as Reserved. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 52
... It is also possible that the spare card could hold all the connection configurations for all the port cards it is protecting locally, for even faster switch over. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ ...
Page 53
... VALID LINK[1:0] Header2 Bit 7 Bit 6 AUX[7:0] Table 5 In-band Message Header Fields Field Name Valid Link[1:0]# Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 32 bytes Free Format Information Bit 5 Bit4 Bit3 PAGE[1:0] Bit 5 Bit4 ...
Page 54
... Only port 0 is fully described as the other ports are identical, being incrementally distributed from address 100h in 20h steps. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 ...
Page 55
... Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Register NSE-8G Master Reset NSE-8G Individual Channel Reset NSE-8G Master JTAG ID SBS Page select – Page 0 SBS Page select – ...
Page 56
... Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Register DCB CONFIGURATION OUTPUT REGISTER DCB ACCESS MODE REGISTER DCB C1 DELAY (RC1FP) REGISTER ...
Page 57
... For all register accesses, CSB must be low. 2. Addresses that are not shown must be treated as Reserved. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Register Port Register Set 12 – Port 12 (Channel 12 ...
Page 58
... N*20H, N here is the port number between 0 and 11. This is done to prevent unnecessary duplication of otherwise identical register sets. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 59
... Holding the NSE- reset state places it into a low power, digital stand-by mode. A hardware reset clears the DRESET bit, thus negating the digital software reset. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ ...
Page 60
... A hardware reset or software DRESET bit 000h sets the RESET[n] bit. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 61
... The MID bits provide the manufacturer identity field in the JTAG identification code. JID The JID bit is bit 0 in the JTAG identification code. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 62
... This bit will be the Page 0 bit sent to SBSn over the In-Band channel – where n is any SBS connected to LVDS links numbered from 0 to 11*. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 63
... This bit will be the Page 1 bit sent to SBSn over the In-Band channel – where n is any SBS connected to LVDS links numbered from 0 to 11*. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 64
... The internal T8TE Interrupt register must be read to clear this interrupt. Which T8TE caused the interrupt can be ascertained by reading the NSE-8G T8TE Interrupt Source Register. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 65
... If the DCBINT bit is a logic one, an interrupt has been generated by the DCB block. The DCB Interrupt register must be read to clear this interrupt. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 66
... If the ILCINT[n] bit is a logic one, an interrupt has been generated by that ILC block. The relevant ILC Interrupt register must be read to clear this interrupt. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 67
... If the R8TDINT[n] bit is a logic one, an interrupt has been generated by that R8TD block. The relevant R8TD Interrupt register must be read to clear this interrupt. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 68
... If the T8TEINT[n] bit is a logic one, an interrupt has been generated by that T8TE block. The relevant T8TE Interrupt register must be read to clear this interrupt Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 69
... The RC1FP active bit (RC1FPA) detects low to high transitions on the RC1FP input. RC1FPA is set high on a rising edge of RC1FP, and is set low when this register is read. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ ...
Page 70
... CMP pin when set to 0. CMP_VAL CMP_VAL is used to provide the CMP signal when CMP_SRC is set to ‘1’ other wise this bit is ignored. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Function ...
Page 71
... INTE This bit, when ‘1’, enables the INTB pin on the NSE. When set to ‘0’ INTB is held ‘1’. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 72
... This bit, when ‘1’, enables the generation of interrupts from the DCB block. When set to ‘0’ DCB interrupts are disabled . Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 73
... This bit, when ‘1’, indicates one or more of the TIP signals from each of the R8TDs is active the result of all TIP signals ORed together. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 74
... This bit will be the USER 0 bit sent to SBSn over the In-Band channel – where n is any SBS connected to LVDS links numbered from 0 to 11* Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 75
... This bit will be the USER 1 bit sent to SBSn over the In-Band channel – where n is any SBS connected to LVDS links numbered from 0 to 11* Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 76
... This bit will be the USER 2 bit sent to SBSn over the In-Band channel – where n is any SBS connected to LVDS links numbered from 0 to 11*. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 77
... The software ID register (FREE) holds whatever value is written into it. Reset clears the contents of this register. This register has no impact on the operation of the NSE. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 78
... This bit will be set to ‘1’ if both oc1fp[n] and r8_rx_c1[n] have occurred at the same time. Otherwise, it will be stay at ‘0’. Read access will clear this bit. Section 12.5 describes the proper use of this register. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 79
... This bit will be set to ‘1’ if oc1fp[n] has not occurred at the time when r8_rx_c1[n] has occurred. Otherwise, it will stay at ‘0’. Read access will clear this Section 12.5 describes the proper use of this register. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 80
... This bit will be set to ‘1’ if r8_rx_c1[n] has not occurred at the time when oc1fp[n] has occurred. Otherwise, it will stay at ‘0’. Read access will clear this bit. Section 12.5 describes the proper use of this register. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 81
... R8C1_EXTRA_INTE[n] is used to enable/disable ( ‘1’ for enable; ‘0’ for disable) the R8C1_EXTRA_INT[n] (defined in Reg 013h) to cause interrupt. This is on per channel* basis. *Any unused ports must be set to ‘0’. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Function ...
Page 82
... R8C1_MISS_INTE[n] is used to enable/disable ( ‘1’ for enable; ‘0’ for disable) the R8C1_MISS_INT[n] (defined in Reg 014h) to cause interrupt. This is on per channel* basis. *Any unused ports must be set to ‘0’ Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 83
... The CSU enable control signal (CSU_ENB) bit forces the CSU into low power configuration. The CSU is disabled when CSU_ENB is logic one. The CSU is enabled when CSU_ENB is logic 0. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 84
... LOCKV is set low when the CSU has not successfully locked with the reference clock. LOCKV is set high if when the CSU has locked with the reference clock. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 85
... INTB is asserted low when both LOCKE and LOCKI are high. If LOCKE is asserted, LOCKI must be cleared before INTB will be reasserted. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 86
... Port6[4:0] This register selects the input port number to map to output port 6 of the DCB for an arbitrary position in the SBI336/TelecomBus frame. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 87
... Port0[4:0] This register selects the input port number to map to output port 0 of the DCB for an arbitrary position in the SBI336/TelecomBus frame. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 88
... PORTADDR fields in the Access Mode register. There SYSCLK cycle latency from when an indirect read is requested until when correct data appears in this register. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 89
... ACCMDE These bits indicate the access mode of the offline connection memory page PORT transfer mode WORD transfer mode. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Function WRB ...
Page 90
... When performing reads through the Configuration Output register, PORTADDR indicates the ports being read as follows: 000xx : ports 5-0 001xx : ports 11-6 010xx : ports 17-12 011xx : ports 23-18 100xx : ports 29-24 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Preliminary 89 ...
Page 91
... A1 byte of the frame and location 24 is the C1 character. This field is ignored in page copy mode. Valid values are 0-9719. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 92
... MF_SWAP Legal Range (clock cycles – 9716 01 26 – 16383 10 26 – 16383 11 26 – 16383 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Function Unused RC1DLY[13:0] Preliminary Default X ...
Page 93
... TelecomBus switching. 1079: SBI column switching. 9719: SBI DS0 switching. 9719: SBI DS0 switching with CAS. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Function Unused FRMSZ[13:0] Preliminary ...
Page 94
... This bit enables the propagation of interrupt to the INT output due to a change in state of SWAPV. This bit does not have an impact on SWAPI bit. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 95
... The duration of a page copy is highly dependent on MF_SWAP. MF_SWAP SYSCLK Clock cycles required “00” Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet 1083 Preliminary 94 ...
Page 96
... When a page copy is in progress, attempting to write to the offline connection memory page will be ignored and attempting to read from the offline connection memory page will return unpredictable results. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 97
... FRAMEI. Changing CMP prior to the occurrence of FRAMEI may cause unpredictable behavior as it may cause CMP to be sampled later than expected. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 98
... R8TD block. OCAV is set high when the character alignment block is in the out- of-character-alignment state. OCAV is set low when the character alignment block is in the in-character-alignment state. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 99
... When RXINV is set low, data is not complemented before R8TD processing. Reserved[2:0] The Reserved[2:0] bits must be set to the indicated default value for correct operation of the NSE. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Preliminary ...
Page 100
... WCIMODE is logic one. INTB is asserted low when both LCVE and LCVI are high. IF LCVE is asserted, LCVI must be cleared before INTB will be reasserted. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 101
... WCIMODE is logic one. INTB is asserted low when both FUOE and FUOI are high. IF FUOE is asserted, FUOI must be cleared before INTB will be reasserted. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 102
... TIP register or by writing to this register. Within either event, the internally accumulated error count is transferred to the LCV registers and the internal error counter is simultaneously reset to begin a new cycle of error accumulation. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 103
... The Reserved bit is set to logic 0 on reset, but needs to be set to logic one following reset for correct operation of the NSE. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 104
... The DRU enable bit (DRU_ENB) bit controls the operation of Data Recovery Unit Analog block #X. Setting DRU_ENB to logic 0 enables the block. Setting DRU_ENB to logic one disables the block. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 105
... The Test Pattern Insertion (TPINS) controls the insertion of test pattern in the outgoing data stream for jitter testing purpose. When this bit is set high, TP[9:0] in the T8TE Test Pattern register is selected for output. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 106
... FIFO underrun/overrun event indication bit (FIFOERRI) in the T8TE block to INTB. When FIFOERRE is high, INTB is asserted low when FIFOERRI is high. INTB is not affected by the value of FIFOERRI when FIFOERRE is low. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 107
... WCIMODE is logic one. INTB is asserted low when both FIFOERRE and FIFOERRI are high. IF FIFOERRE is asserted, FIFOERRI must be cleared before INTB will be reasserted. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 108
... Termination (LPT). For correct operation see table below: TMODEx[1] TMODEx[ Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Function Default Unused X TMODE8[1] 0 TMODE8[0] 0 TMODE7[1] ...
Page 109
... Termination (LPT). For correct operation see the table below: TMODEx[1] TMODEx[ Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Function Default Unused X TMODE12[1] 0 TMODE12[0] 0 ...
Page 110
... The Test Pattern register (TP[9:0]) for T8TE block #X contains the test pattern conditionally inserted into output data stream #X. TP[9:0] is inserted into the output data stream when the TPINS bit is set high. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 111
... TXLV block. TXLV_ENB is set to logic 0 to enable the TXLV block. Reserved[8] The Reserved[8] bit must be set to the indicated default value for correct operation of the NSE. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Function Default ...
Page 112
... TDAT[31: 0]Transmit FIFO form the 32 bit wide data word to be written to the register file FIFO. A single 32 bit write to this register will update TDAT[31:0]. A write to this address initiates a FIFO write sequence. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 113
... AUX header byte of each subsequent message to the other end of the inband link. A new value of TX_AUX will be transmitted at the next available message. Data read from this register will be the data previously written. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 114
... User and Page bits are a copy of the User bits received, and being transmitted in 0Ch. These allow one read in the 32 bit device to gain a snapshot of the entire ILC. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ ...
Page 115
... This bit indicates that the value of TX_MSG_LVL is valid. When read with a ‘0’ this register should be re-read until TX_MSG_LVL_VALID is a ‘1’. This bit will be clear for only approximately 0.3% of time. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 116
... RDAT[31 the 32 bit wide data word read from the FIFO. A single read from this register will update RDAT[31:0]. A read from this address initiates a FIFO read sequence. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 117
... Reserved[15:3] Reserved for future use. Reserved[2] Default Value is ‘0’, but should be set to ‘1’ for correct operation. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Function Unused ...
Page 118
... FIFO return the last Dword read from the Receive FIFO and prefetch the next Dword (when available). This bit must be written to a ‘1’ at the start of a message read sequence. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 Function ...
Page 119
... This bit need not be read by software if the time interval between successive Receive FIFO DATA register reads greater than approximately 4 SYSCLK cycles when FAST_RD_EN = ‘1’ or approximately 3 SYSCLK cycles when FAST_RD_EN = ‘0’. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 120
... CRC-16 error). These bits are available in the two top level SBS page bits registers at a bit position equal to the link number. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 121
... When read with a ‘0’ this register should be re-read until RX_STTS_VALID is a ‘1’. This bit will be set for only approximately 0.15% of time. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 122
... RX_OVFLWI is a ‘1’. RX_THRSHLDE Writing a ‘1’ to the RX_THRSHLDE bit enables the generation of an interrupt when RX_THRSHLDI is a ‘1’ Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Function ...
Page 123
... These bits specify a variable delay, relative to a read from the receive message FIFO, in steps of 125 us, before an interrupt is generated, if the Receive FIFO level is greater than 0. The objective is to stop stale messages collecting in the RXFIFO. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 124
... Table 10 RXFIFO Timeout Delay RX_TIMEOUT_VAL[1: Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 Nominal Minimum Maximum Delay Delay from Delay from message message In Frames reception reception 1 152us 222 us 2 277us 347 us 3 402us ...
Page 125
... This bit, when ‘1’, indicates a Receive FIFO Threshold reached. This bit is cleared on a read. RX_TIMEOUTI This bit, when ‘1’, indicates a Receive FIFO Timeout. This bit is cleared on read. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 126
... Writeable test mode register bits are not initialized upon reset unless otherwise noted. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 127
... NSE-8G to drive the data bus and holding the CSB pin high tri-states the data bus. The DBCTRL bit overrides the HIZDATA bit. The DBCTRL bit is used to measure the drive capability of the data bus driver pads. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 128
... Part Number – NSE-20G Part Number – NSE–8G Manufacturer's Identification Code Device Identification – NSE-20G Device Identification – NSE-8G Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 Selected Register Instruction Codes, IR[2:0] Boundary Scan ...
Page 129
... OEB_D[28] D[28] OEB_D[27] D[27] OEB_D[26] D[26] OEB_D[25] D[25] OEB_D[24] D[24] OEB_D[23] D[23] OEB_D[22] D[22] Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Register Bit Cell Type 121 OUT_CELL 120 OUT_CELL 119 IN_CELL 118 IN_CELL 117 ...
Page 130
... OEB_D[10] D[10] OEB_D[9] D[9] OEB_D[8] D[8] OEB_D[7] D[7] OEB_D[6] D[6] OEB_D[5] D[5] OEB_D[4] D[4] OEB_D[3] D[3] OEB_D[2] D[2] Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Register Bit Cell Type 83 OUT_CELL 82 IO_CELL 81 OUT_CELL 80 IO_CELL 79 OUT_CELL 78 IO_CELL 77 OUT_CELL ...
Page 131
... Logic one Logic one Logic one Logic one Logic one Logic one Logic one Logic one Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Register Bit Cell Type 43 OUT_CELL 42 ...
Page 132
... G1 and G2. The ID Code bit is as listed in the Boundary Scan Register, Table 14. Figure 13 Input Observation Cell (IN_CELL) I.D. Code bit CLOCK-DR Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 Register Bit Cell Type 3 ...
Page 133
... UPDATE-DR Figure 15 Bidirectional Cell (IO_CELL) EXTEST OUTPUT from internal logic IDCODE SHIFT-DR INPUT from pin I.D. code bit CLOCK-DR UPDATE-DR Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue MUX MUX ...
Page 134
... Figure 16 Layout of Output Enable and Bidirectional Cells OUTPUT ENABLE from internal logic (0 = drive) internal logic OUTPUT from internal logic Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 Scan Chain Out OUT_CELL INPUT to IO_CELL Scan Chain In NSE-8G™ ...
Page 135
... Reset States of Various Operation Modes Post Hardware Reset: Register 000H : DRESET Register 000H : ARESET Register 001H : RESET Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ‘0’ ‘0’ ...
Page 136
... Register 001H : RESET Figure 17 Shutting Down a Link R8TD DRU RXLV RESET[N] from register 001H Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ‘0’ ‘0’ ‘0x00000000’ ‘0’ ...
Page 137
... Note: The SBS device, being a memory switch adds a latency of one complete frame or row plus a few clock ticks to the data. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 (equal determines the start of an STS-12 frame; this signal is ...
Page 138
... SBI frames are aligned going into the NSE-8G device. Compatible devices are TEMUX-84, FREEDM-336, FREEDM-336-84 bond-out, S/UNI-IMA- 84, and other future SBI336 devices. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 t ...
Page 139
... SBS#2 OCMP NSE CMP SBS #1 TCMP C1FP DC1FP TEMUX84 AC1FP SBS#2 TCMP SBS #1 OCMP Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet RC1FP CMP IC1FP TCMP SBI336 SBI336S ...
Page 140
... SBI multiframe rather than the longer 48-frame SBI bus signaling multiframe. The advantage is that there is less latency when making switch configuration changes via the CMP signals. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 2500us ...
Page 141
... TEMUX84 AC1FP SBS#2 TCMP SBS #1 OCMP The following timing diagram shows the system timing when in this configuration. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet RC1FP CMP IC1FP ...
Page 142
... Figure 22 from the previous section can be used here. The following timing diagram shows the system timing for this mode of operation. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 143
... The NSE-8G CPU will have the rest of the frame to signal a page switch to the DCB as this is sampled on the next frame Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 144
... C1 code word was detected at the wrong time, software can then poll the monitor register (012h) to see if the error condition is permanent. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 outgoing ...
Page 145
... In port transfer mode, the microprocessor updates only one configuration entry within a word of offline connection memory page. The steps to perform a port transfer are shown in the following example: Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet 30 ...
Page 146
... CPU writes new mapping to the Configuration 5-0 Port register . 7. CPU write 0x40001000 to the DCB Access Mode register. Causes Mux C to switch in WORDCFG. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 147
... Logic one indicates copying in progress and logic zero indicates copying complete. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 148
... This will program the DCB to effect page changes at every 4 x 9720 frame when a page swap request is received. OC1FP will be output at every 4 frame. CMP inputs will be sampled every 4 frame at the internally flywheeled RC1FP location. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet th frame ...
Page 149
... This will program the DCB to effect page changes at every 48 x 9720 frame when a page swap request is received. OC1FP will pulse every 48th frame. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 150
... The header’s Valid bit is not set as an indication to the far end to discard the message (not insert the null message into its RxFIFO). 12.12 ILC CPU Operations 12.12.1 Accessing the Transmit Message FIFO Access registers in the following order: Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue ...
Page 151
... PROCEDURE Message_Receive IS VARIABLE dword_rd_cnt VARIABLE msg_done VARIABLE polled_rx_mode : BOOLEAN := false; VARIABLE msg_lvl_loop VARIABLE msgs_rd BEGIN -- Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet : NATURAL := 0; : BOOLEAN := false; : NATURAL := 0; : NATURAL := 0; Preliminary ...
Page 152
... Poll the bit here before starting next message. -- rd(RX_STTS); WHILE rx_fi_busy = '1' LOOP rd(RX_STTS); END IF; rx_msg_cnt_o <= rx_msg_cnt_o + 1; msgs_rd := msgs_rd + 1; -- Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet -- Loop on read value of rx_msg_lvl --- Simulation Stuff Preliminary 151 ...
Page 153
... END IF; IF msg_done AND dword_rd_cnt < 8 THEN -- -- We' short message. Need to do RX_XFER_SYNC -- Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet := false The returned data is part of the payload conv_integer(reg_rd_data(8*j+7 DOWNTO 8*j)) ...
Page 154
... When any of these bits change they are sent in the header bits of the next message. They will be continually sent for each subsequent message until they change again. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ ...
Page 155
... When TX_BYPASS is set, writes to the transmit FIFO are ignored and when RX_BYPASS is set, reads from the receive FIFO return random data. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 156
... They will be continually sent until they change again. All other header bits are sent immediately. All ILC interrupts are masked on startup, and should not be enabled until the ILC links initialize. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 A1 ...
Page 157
... Multicast connections are a mapping of a single spacetimeslot to multiple output spacetimeslots. This algorithm is only concerned with the unicast problem. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 158
... It is known that any complete permutation from Matrix I to Matrix IV can be carried out in this way. Figure 19 illustrates two particular octets ( and ) being switched through the SBS-NSE- SBS Time:Space:Time switch. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 159
... T=2) => SBS => (S=1, T=0) => NSE => (S=0, T=0) => SBS => (S=0, T=3) (S=3, T=2) => SBS => (S=3, T=3) => NSE => (S=1, T=3) => SBS => (S=1, T=0) Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Egress SBSs SBS 0 SBS 1 SBS 2 SBS 3 ...
Page 160
... These permutation mappings correspond to one set of switch settings for the NSE- 8G devices. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 161
... Figure 30. The new connection originates at input node F, and terminates at output node 6. This is edge ( the bipartite graph. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 162
... Figure 32. The timeslot labeling in this graph replaces timeslots 2 and 3 in the original graph (and schedule). Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 ...
Page 163
... Heuristic algorithms that have statistical probability of success for simple versions of the problem; (and) Restricted multicast, where the form of restriction provides a means to solve the scheduling problem. 1 This ignores inband NSE limitations. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue ...
Page 164
... TDO. In addition, patterns can be shifted in on primary input, TDI and forced onto all digital outputs. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ ...
Page 165
... TAP controller state by forcing input, TMS high for 5 TCK clock cycles. While in this state, the instruction register is set to the IDCODE instruction. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 TRSTB=0 ...
Page 166
... TCK. The Pause-DR and Pause-IR states are provided to allow shifting through the test data and/or instruction registers to be momentarily paused. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 167
... The code can then be shifted out output, TDO using the Shift-DR state. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 168
... This delay will be either one frame (9720 clock cycles) or one row (1080 clock cycles) depending on the mode employed. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 plus 15. The maximum value is the delay through the SBS plus 31. ...
Page 169
... RC1DLY + 43 + 9696 cycles and RC1DLY + 51 + 9696 cycles, represent the first data switched according the connection memory page selected by CMP at the RC1FP pulse time. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 170
... The terminal count of this counter is used as an internal substitute for RC1FP. In this way the CMP signal is always sampled at the C1 position regardless of the RC1FP presence or absence at the C1 position. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 ... ...
Page 171
... When powering up the NSE, the following power supply sequence should be observed VDDO, AVDH, CSU_AVDH VDDI, AVDL Powering down should be the reverse. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet -40°C to +85°C -40° ...
Page 172
... Input High Current I IL Input Low Current - Input High Current C IN Input Capacitance C OUT Output Capacitance Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Min Typ Max 1.66 1.8 1.94 3.14 3.3 3.47 0 TBD 0 ...
Page 173
... Input pin or bi-directional pin without internal pull-up resistor 3. Negative currents flow into the device (sinking), positive currents flow out of the device (sourcing). Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 174
... Notes on Microprocessor Interface Read Timing: 1. Output propagation delay time is the time in nanoseconds from the 1.4 V point of the reference signal to the 1.4 V point of the output. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet tSar ...
Page 175
... When a hold time is specified between an input and a clock, the hold time is the time in nanoseconds from the 1.4 V point of the input to the 1.4 V point of the clock. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 176
... When a hold time is specified between an input and a clock, the hold time is the time in nanoseconds from the 1.4 V point of the input to the 1.4 V point of the clock. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet ...
Page 177
... V point of the input to the 1.4 V point of the clock. 2. When a hold time is specified between an input and a clock, the hold time is the time in nanoseconds from the 1.4 V point of the clock to the 1.4 V point of the input. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 tLO SYSCLK ...
Page 178
... Reset Timing Table 20 RSTB Timing (Figure 41 ) Symbol Description tV RSTB RSTB Pulse Width Figure 42 RSTB Timing RSTB Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet tV RSTB Preliminary Min Max ...
Page 179
... TDI Set-up time to TCK tH TDI TDI Hold time to TCK tP TDO TCK Low to TDO Valid tV TRSTB TRSTB Pulse Width Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Min 10f -100ppm SYSCLK 200 ± ...
Page 180
... Figure 43 JTAG Port Interface Timing TCK TDI TMS TDO TRSTB Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 tHItck tHItck tStdi tHtdi tStms tHtms tVtrstb tVtrstb NSE-8G™ Standard Product Data Sheet Preliminary tLOtck ...
Page 181
... Ordering and Thermal Information 18.1 Packaging Information Part No. PM8621-BIAP 18.2 Thermal Information In full operation (10–12 ports), the NSE-8G is designed to operate over a wide temperature range when used with a heat sink with a worst case Junction to case Tj (Tjc °C/W and is suited for industrial applications such as outside plant ...
Page 182
... JESD51 (2S2P the junction-to-board thermal resistance and JB resistance are obtained by simulating conditions described in JEDEC Standard, JESD 15-8 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 1 This condition will typically be reached when 2 Natural Convection 200 LFM 13 ...
Page 183
... BODY SIZE : 1.47 MM Dim Min. - 1.32 0.40 0.92 0.97 35.00 33.00 35.00 33.00 Nom. 1.47 0.50 BSC Max. 1.62 0.60 1.02 - Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 aaa eee bbb C ddd M,N ...
Page 184
... Notes Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-2010850, Issue 1 NSE-8G™ Standard Product Data Sheet Preliminary 183 ...