STE10-100A STMicroelectronics, STE10-100A Datasheet - Page 61
STE10-100A
Manufacturer Part Number
STE10-100A
Description
Pci 10/100 Ethernet Controller With Integrated Phy
Manufacturer
STMicroelectronics
Datasheet
1.STE10-100A.pdf
(82 pages)
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STE10/100A
Table 10.
XR4(offset = c4h) - ANA, Auto-negotiation advertisement
XR5(offset = c8h) - ANLP, Auto-negotiation link partner ability
12,11
12,11
Bit #
4~0
15
14
13
10
15
14
13
10
9
8
7
6
5
NXTPG
LPACK
Transceiver registers description (continued)
Name
LPNP
LPRF
LPFC
TXH
TXF
10H
10F
RF
FC
SF
T4
---
---
---
Next page ability.
Always 0; STE10/100A does not provide next
page ability.
reserved
Remote fault function.
1: remote fault function present
Reserved
Flow control function ability.
1: supports PAUSE operation of flow control for
full duplex link.
100BASE-T4 ability.
Always 0; STE10/100A does not provide
100BASE-T4 ability.
100BASE-TX full duplex ability.
1: 100Base-TX full duplex ability supported
100BASE-TX half duplex ability.
1: 100Base-TX ability supported.
10BASE-T full duplex ability.
1: 10Base-T full duplex ability supported.
10BASE-T half duplex ability.
1: 10Base-T ability supported.
Select field. Default 00001=IEEE 802.3
Link partner next page ability.
0: link partner without next page ability.
1: link partner with next page ability.
Received link partner acknowledge.
0: link code word not yet received.
1: link partner successfully received
STE10/100A’s link code word.
Link partner’s remote fault status.
0: no remote fault detected.
1: remote fault detected.
Reserved
Link partner’s flow control ability.
0: link partner without PAUSE function ability.
1, link partner with PAUSE function ability for full
duplex link.
Description
Registers and descriptors description
Default
00001
0
0
1
0
1
1
1
1
0
0
0
0
0
RW type
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
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