S1D13503 Epson Electronics America, Inc., S1D13503 Datasheet - Page 139

• Manufacturer Part Number: S1D13503
• Description: S1d13503 Graphics Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
5.3 Mapping of Registers
5.3.1 Indexed Mapping
Programming Notes and Examples
Issue Date: 01/01/30
The S1D13503 has an internal set of 16-/8-bit read/write registers which configure it for various modes of operation. The
registers can be accessed in two ways; Indexed Addressing and Direct Addressing.
Note
Refer to the S1D13503 Hardware Functional Specification (Document number X18A-A-001-xx) for
more information on the S1D13503 registers.
This method requires only two sequential I/O address locations starting from the base I/O address. The base I/O address is
determined by the power-on state of the SRAM data lines VD[4 through 12]. See “Summary of Configuration Options” in
the S1D13503 Hardware Functional Specification, Drawing Office No. X18A-A-001-xx.
The S5U13503B00C Evaluation Board uses three sequential I/O addresses which are defined as Index Address, Index Data,
and Memory Banking. To access registers using this method, an Index Address must be written to the first I/O address
location allowing data to be written/read to/from the second I/O address.
The Memory Banking port is specific to the S5U13503B00C implementation and is used to select one of two 64K display
memory banks; a read from this port selects bank 0, and a write to this port selects bank 1. Note that the values read from
or written to the Memory Banking port are not important.
Offset
(hex)
03C0
08C0
0000
0140
0280
0500
0640
0780
F
F
F
F
0
0
0
0
0
0
0
0
0
0
0
0
F
F
0
0
0
0
0
0
0
0
0
0
F
F
0
0
F
F
F
F
F
F
F
F
F
F
F
F
F
F
0
0
Figure 15: Display Memory Contents For Message “Text” In 256 Color Mode
F
F
F
F
F
F
F
F
F
F
F
F
F
F
0
0
F
F
0
0
0
0
0
0
0
0
0
0
F
F
0
0
F
F
F
F
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F
F
0
0
0
0
0
0
0
0
0
0
F
F
0
0
F
F
F
F
F
F
F
F
F
F
F
F
F
F
0
0
F
F
F
F
F
F
F
F
F
F
F
F
F
F
0
0
F
F
0
0
0
0
F
F
0
0
0
0
F
F
0
0
F
F
0
0
F
F
F
F
F
F
0
0
F
F
0
0
F
F
0
0
0
0
0
0
0
0
0
0
F
F
0
0
F
F
F
F
0
0
0
0
0
0
F
F
F
F
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F
F
F
F
0
0
0
0
0
0
0
0
F
F
0
0
F
F
F
F
F
F
0
0
0
0
F
F
F
F
0
0
0
0
0
0
F
F
F
F
F
F
F
F
0
0
0
0
0
0
0
0
0
0
F
F
F
F
0
0
0
0
0
0
0
0
0
0
F
F
F
F
F
F
F
F
0
0
0
0
F
F
F
F
F
F
0
0
0
0
F
F
F
F
0
0
F
F
F
F
0
0
0
0
0
0
0
0
F
F
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F
F
F
F
0
0
0
0
0
0
0
0
0
0
0
0
F
F
0
0
0
0
0
0
0
0
0
0
F
F
0
0
F
F
F
F
F
F
F
F
F
F
F
F
F
F
0
0
F
F
F
F
F
F
F
F
F
F
F
F
F
F
0
0
F
F
0
0
0
0
0
0
0
0
0
0
F
F
0
0
F
F
F
F
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X18A-G-002-06
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Offset
03DF
08DF
(hex)
S1D13503
001F
015F
029F
051F
065F
079F
Page 43