S1D13503 Epson Electronics America, Inc., S1D13503 Datasheet - Page 33

no-image

S1D13503

Manufacturer Part Number
S1D13503
Description
S1d13503 Graphics Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S1D13503F00A
Manufacturer:
EPSON/爱普生
Quantity:
20 000
Part Number:
S1D13503F00A
Quantity:
10
Part Number:
S1D13503F00A2
Manufacturer:
EPSON
Quantity:
648
Part Number:
S1D13503F00A2
Manufacturer:
EPSON/爱普生
Quantity:
20 000
Part Number:
S1D13503F00A200
Manufacturer:
VISHAY
Quantity:
23 000
Part Number:
S1D13503F01A1
Manufacturer:
EPSON
Quantity:
130
Part Number:
S1D13503F01A1
Manufacturer:
EPSON
Quantity:
1 000
Part Number:
S1D13503F01A1
Manufacturer:
EPSON/爱普生
Quantity:
20 000
Part Number:
S1D13503F01A2
Manufacturer:
SIEKO
Quantity:
900
Part Number:
S1D13503F01A2
Manufacturer:
EPSON
Quantity:
586
Part Number:
S1D13503F01A2
Manufacturer:
EPSON/爱普生
Quantity:
20 000
Epson Research and Development
Vancouver Design Center
Hardware Functional Specification
Issue Date: 01/01/29
Pin Name
UD3-UD0
LD3-LD0
XSCL
LP
WF/
XSCL2
YD
LCDENB
Pin
Name
OSC1
OSC2
Pin Name
V
V
DD
SS
a
VESA Flat Panel Display Interface Standard (FPDI-1
FPDI-1
Pin Name
UD3-UD0
UD3-LD0
FPSHIFT
FPLINE
MOD
FPSHIFT2
FPFRAME O
Type
I
O
-----
Type
P
P
TM
F00A
Pin #
92
93
a
Type
O
O
O
O
O
F01A
Pin #
89
90
F00A
Pin #
70 - 73
74 - 77
81
79
80
78
82
F00A Pin #
3, 53
2, 52
D00A
Pad #
115
116
F01A
Pin #
67 - 70
71 - 74
78
76
77
75
79
Driver
*
*
D00A
Pad #
86 - 89
90 - 93
100
96
97
94
101
TM
Table 5-3: LCD Interface
Table 5-5: Power Supply
Table 5-4: Clock Inputs
)
F01A Pin #
50, 100
49, 99
Driver Description
CO3S
CO3
CO3
CO3
CO3
CO2
Description
This pin, along with OSC2, is the 2-terminal crystal interface when
using a 2-terminal crystal as the clock input. If an external
oscillator is used as a clock source, then this pin is the clock input.
This pin, along with OSC1, is the 2-terminal crystal interface when
using a 2-terminal crystal as the clock input. If an external
oscillator is used as a clock source this pin should be left
unconnected.
Panel display data bus. The data format depends on the
specific panel connected. For 4-bit single panels, LD3-LD0
are driven low (0 state).
Display data shift clock. Data is shifted into the LCD
X-drivers on the falling edge of this signal.
Display data latch clock. The falling edge of this signal is
used to latch a row of display data in the LCD X-drivers
and to turn on the Y driver (row driver).
For format 1 of 8-bit single color panels this is the second
shift clock.
For all other modes, this is the LCD backplane BIAS
signal. This output toggles once every frame, or as
programmed in AUX[05] bits 7-2.
Vertical scanning start pulse. A logic ‘1’ on this signal,
sampled by the LCD module on the falling edge of LP, is
used by the panel Y driver (row driver) to indicate the start
of the vertical frame.
LCD enable signal output. It can be used externally to turn
off the panel supply voltage and backlight.
3, 67
1, 65
D00A Pad #
Driver
P
P
Description
Voltage supply
Voltage ground
X18A-A-001-08
S1D13503
Page 25

Related parts for S1D13503