S1D13503 Epson Electronics America, Inc., S1D13503 Datasheet - Page 31

• Manufacturer Part Number: S1D13503
• Description: S1d13503 Graphics Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
Hardware Functional Specification
Issue Date: 01/01/29
Pin Name Type
IOW#
IOR#
MEMCS# I
MEMW#
MEMR#
READY
RESET
I
I
I
I
I
O
F00A
Pin #
85
86
87
88
89
90
32
F01A
Pin #
82
83
84
85
86
87
29
D00A
Pad #
104
106
107
109
110
112
37
Table 5-1: Bus Interface
Driver
TTLS
TTLS
TTLS
TTLS
TTLS
TS3
TTLS
Active low input to indicate a memory cycle.
Active high input to force all signals to their inactive states.
Description
In MC68000 MPU interface, this pin is connected to the R/W#
pin of MC68000. This input pin defines whether the data
transfer is a read (active high) or write (active low) cycle. In
other MPU/Bus interfaces, this is the active low input to write
data into an internal register.
In MC68000 MPU interface, this pin is connected to the AS#
pin of MC68000. This input pin indicates a valid address is
available on the address bus. In other MPU/Bus interfaces, this
is the active low input to read data from an internal register.
Active low input to indicate a memory write cycle. This pin
should be tied to V
Active low input to indicate a memory read cycle. This pin
should be tied to V
For MC68000 MPU interface, this pin is connected to the
DTACK# pin of MC68000 and is driven low when the data
transfer is complete. In other MPU/Bus interfaces, this output
is driven low to force the system to insert wait states when
needed.
READY is placed in a high impedance (Hi-Z) state after the
transfer is completed.
DD
DD
in an MC68000 MPU interface.
in an MC68000 MPU interface.
X18A-A-001-08
S1D13503
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