LM5060Q1 National Semiconductor Corporation, LM5060Q1 Datasheet - Page 11

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LM5060Q1

Manufacturer Part Number
LM5060Q1
Description
High-side Protection Controller With Low Quiescent Current
Manufacturer
National Semiconductor Corporation
Datasheet

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Functional Description
The LM5060 is designed to drive an external high-side N-
channel MOSFET. Over-Current protection is implemented
by sensing the voltage drop across the MOSFET. When an
adjustable voltage drop threshold is exceeded, and an ad-
justable time period has elapsed, the MOSFET is disabled.
Over-Voltage Protection (OVP) and Under-Voltage Lock-Out
(UVLO) monitoring of the input line is also provided. A low
state on the enable pin will turn off the N-channel MOSFET
and switch the LM5060 into a very low quiescent current off
state. An active low power good output pin is provided to re-
port the status of the N-channel MOSFET. The waiting time
before the MOSFET is turned off after a fault condition is de-
tected can be adjusted with an external timer capacitor. Since
the LM5060 uses a constant current source to charge the gate
of the external N-channel MOSFET, the output voltage rise
time can be adjusted by adding external gate capacitance.
This is useful when starting up into large capacitive loads.
POWER-UP SEQUENCE
The basic application circuit is shown in
start-up sequence is shown in
LM5060 is initiated when the EN pin is above the (EN
threshold (2.0V). At start-up, the timer capacitor is charged
with a 6 µA (typical) current source while the gate of the ex-
ternal N-channel MOSFET is charged through the GATE pin
by a 24 µA (typical) current source.
Figure
Figure 1
2. Start-up of the
FIGURE 1. Basic Application Circuit
and a normal
THH
)
11
When the gate-to-source voltage (V
TH
capacitor is quickly discharged to 0.3V, and begins charging
the timer capacitor with a11 µA current source.
The timer capacitor will charge until either the V
tor indicates that the drain-to-source voltage (V
reduced to a nominal value (i.e. no fault) or the voltage on the
timer capacitor has reached the V
The V
the SENSE pin and the OUT pin. The SENSE pin voltage is
user programmed to be lower than the input supply voltage
by selecting a suitable sense resistor value. When the OUT
pin voltage exceeds the voltage at the SENSE pin, the nPGD
pin is asserted low (i.e. no fault) and the timer capacitor is
discharged.
STATUS CONDITIONS
Output responses of the LM5060 to various input conditions
is shown in
(EN), Under-Voltage Lock-Out (UVLO), Over-Voltage Protec-
tion (OVP), input voltage (VIN), Start-Up Fault (V
Fault (V
current consumption, the GATE charge current, the TIMER
capacitor charge (or discharge) current, the GATE discharge
current if the timer capacitor voltage has reached the V
threshold (typically 2V), as well as the status of nPGD.
threshold (typically 5V) the V
DS
DS
Comparator monitors the voltage difference between
) conditions. The output responses are the VIN pin
Table
1. The input parameters include Enable
GS
TMRH
sequence ends, the timer
GS
) reaches the V
threshold (i.e. fault).
30104222
DS
DS
GS
www.national.com
) has been
Compara-
) and Run
GATE-
TMRH

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