LM5060Q1 National Semiconductor Corporation, LM5060Q1 Datasheet - Page 5

• Manufacturer Part Number: LM5060Q1
• Description: High-side Protection Controller With Low Quiescent Current
• Manufacturer: National Semiconductor Corporation

Symbol
Timer (TIMER Pin)
Power Good (nPGD Pin)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including in-operability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. Operating Range conditions indicate the conditions at which the device is functional and the device should
not be operated beyond such conditions. For guaranteed specifications and conditions, see the Electrical Characteristics table.
Note 2: The Human Body Model (HBM) is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Applicable standard is JESD-22–A114–C.
Note 3: Soldering process must comply with National Semiconductor's Reflow Temperature Profile specifications. Reflow temperature profiles are different for
lead-free and non-lead-free packages. Refer to the Packaging Data Book available from National Semiconductor, or : www.national.com/analog/packaging
Note 4: The GATE pin voltage is typically 12V above the VIN pin when the LM5060 is enabled. Therefore, the Absolute Maximum Rating for VIN (75V) applies
only when the LM5060 is disabled, or for a momentary surge to that voltage since the Absolute Maximum Rating for the GATE pin is also 75V.
Note 5: The minimum voltage of -1V is allowed if the current is limited to below -25 mA. Also it is assumed that the negative voltage on the pins only occur during
reverse battery condition when a positive supply voltage (Vin) is not applied.
Note 6: The minimum voltage of -25V is allowed if the current is limited to below -25 mA. Also it is assumed that the negative voltage on the pins only occur during
reverse battery condition when a positive supply voltage (VIN) is not applied.
V
GATE-CLAMP
V
PGD
PGD
I
I
I
V
V
V
t
GATE-TH
TIMERH
TIMERL
TIMERR
FAULT
TMRH
GATE
TMRL
VOL
IOH
Parameter
Gate output voltage in normal
operation
V
voltage
Zener Clamp between GATE Pin and
OUT Pin
Timer Fault Threshold
Timer Re-enable Threshold
Timer Charge Current for V
Timer Start-Up Charge Current
Timer Reset Discharge Current
Fault to GATE Low delay
Output low voltage
Off leakage current
GS
Status Comparator Threshold
DS
Fault
Conditions
GATE - VIN Voltage
GATE Pin Open
GATE - OUT threshold voltage for TIMER
voltage reset and TIMER current change
I
TIMER Pin Voltage Rising
TIMER pin Voltage Falling
TIMER Charge current after Start-Up.
V
TIMER Charge current during Start-Up.
V
TIMER Pin = 1.5V
TIMER Pin > 2.0V
No load on GATE pin
I
V
GATE-CLAMP
SINK
GS
GS
nPGD
= 6.5V
= 3.5V
= 2 mA
= 10V
5
= 0.1mA
Min.
3.50
8.5
4.0
4.4
10
-
-
-
-
-
-
Typ.
16.8
0.30
0.02
2.0
12
11
80
5
6
6
5
www.national.com
Max. Units
6.50
13.0
1.00
205
7.0
8.2
14
-
-
-
-
mA
mV
µA
µA
µA
µs
V
V
V
V
V