LM5060Q1 National Semiconductor Corporation, LM5060Q1 Datasheet - Page 15

• Manufacturer Part Number: LM5060Q1
• Description: High-side Protection Controller With Low Quiescent Current
• Manufacturer: National Semiconductor Corporation

UNDER-VOLTAGE LOCK-OUT (UVLO)
The Under-Voltage Lock-Out function will turn off the external
N-Channel MOSFET with a 2.2 mA (typical) current sink at
the GATE pin.
LO input. A resistor divider as shown in
R11 sets the voltage at which the UVLO function engages.
The UVLO pin may also be used as a second enable pin for
applications requiring a redundant, or secondary, shut-down
control. Unlike the EN pin function, the UVLO function does
not switch the LM5060 to the low current (disabled) state.
If the Under-Voltage Lock-Out function is not needed, the
UVLO pin should be connected to the VIN pin. The UVLO pin
should not be left floating as the internal pull-down will keep
the UVLO active.
In addition to the programmable UVLO function, an internal
Power-On-Reset (POR) monitors the voltage at the VIN pin
and turns the MOSFET Off when VIN falls below typically
5.10V.
OVER-VOLTAGE PROTECTION (OVP)
The Over-Voltage Protection function will turn off the external
N-Channel MOSFET if the OVP pin voltage is higher than the
FIGURE 6. Under-Voltage Lock-Out Threshold Levels
Figure 6
shows the threshold levels of the UV-
Figure 1
30104227
with R10 and
15
OVP
with R8 and R9, shown in
Protection threshold. An internal 9.6 µs timer filters the output
of the Over-Voltage Comparator to prevent noise from trig-
gering an OVP event. An OVP event lasting longer than
typically 9.6 µs will cause the GATE pin to be discharged with
an 80 mA current sink and will cause the capacitor on the
TIMER pin to be discharged.
If the Over-Voltage Protection function is not needed, the
OVP pin should be connected to GND. The OVP pin should
not be left floating.
RESTART AFTER OVP EVENT
After the OVP function has been activated and the gate of the
external N-Channel MOSFET has been pulled low, the OUT
pin is likely to be low as well. However, an OVP condition will
not cause the V
because the capacitor on the TIMER pin is also discharged
during an OVP event. After the OVP pin falls below the lower
threshold (typically 1.76V), the LM5060 will re-start as de-
scribed in the normal start-up sequence and shown in
2. The EN, VIN, or UVLO pins do not need to be toggled low
to high to re-enable the MOSFET after an OVP event.
nPGD Pin
The nPGD pin is an open drain connection that indicates
when a V
voltage is higher than the OUT pin voltage the state of the
nPGD pin will be high impedance. In the typical application,
as shown in
during any V
dent of the fault timer function. The resistance R4 should be
selected large enough to safely limit the current into the nPGD
pin. Limiting the nPGD low state current below 5 mA is rec-
ommended.
TH
threshold (typically 2V). A resistor divider made up
DS
Figure
fault condition has occurred. If the SENSE pin
DS
DS
fault condition. The nPGD state is indepen-
Fault Comparator to latch off of the LM5060
1, the voltage at the nPGD pin will be high
Figure
1, sets the Over-Voltage
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Figure