TSS463C ATMEL Corporation, TSS463C Datasheet - Page 27

• Manufacturer Part Number: TSS463C
• Description: Van Data Link Controller With Serial Interface
• Manufacturer: ATMEL Corporation

Control and Status Registers
Line Control Register (0x00)
CD[3:0]:Clock Divider
PC: Pulsed Code
IVTX: Invert TxD output
IVRX: Invert RxD inputs
Transmit Control Register
(0x01)
MR[3:0]: Maximum Retries
7601B–AUTO–02/06
•
•
•
They control the VAN Bus rate through a Baud Rate generator according to the formula
below:
One: The TSS463C will transmit and receive data using the pulsed coding mode (i.e
optical or radio link mode). The use of this mode implies communication via the RxD0
input and the non-functionality of the diagnosis system.
Zero: (default at reset) The TSS463C will transmit and receive data using the Enhanced
Manchester code. (RxD0, RxD1, RxD2 used).
The user can invert the logical levels used on either the TxD output or the RxD inputs in
order to adapt to different line drivers and receivers.
One: A one on either of these bits will invert the respective signals.
Zero: (default at reset) The TSS463C will set TxD to recessive state in Idle mode and
consider the bus free (recessive states on RxD inputs).
•
•
These bits allow the user to control the amount of retries the circuit will perform if any
errors occurred during transmission.
f TSCLK
(
MR3
CD3
Read/write register.
Default value after reset: 0×00
Reserved: Bit 2, this bit must not be set by the user; a 0 must always be written to
this bit.
Read/Write register.
Default value after reset: 0x02
7
7
)
=
MR2
CD2
f XTAL1
------------------------ -
6
6
(
n
×
16
)
MR1
CD1
5
5
MR0
CD0
4
4
VER2
PC
3
3
VER1
2
0
2
VER0
IVTX
TSS463C
1
1
IVRX
MT
0
0
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