DSPIC33FJ32MC202 Microchip Technology Inc., DSPIC33FJ32MC202 Datasheet - Page 114

• Manufacturer Part Number: DSPIC33FJ32MC202
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

9.4.3.3
The control schema of peripheral select pins is not lim-
ited to a small range of fixed peripheral configurations.
There are no mutual or hardware-enforced lockouts
between any of the peripheral mapping SFRs. Literally
any combination of peripheral mappings across any or
all of the RPn pins is possible. This includes both
many-to-one and one-to-many mappings of peripheral
inputs and outputs to pins.
While such mappings may be technically possible from
a configuration point of view, they may not be
supportable electrically.
9.4.4
Because peripheral remapping can be changed during
run time, some restrictions on peripheral remapping
are needed to prevent accidental configuration
changes. dsPIC33F devices include three features to
prevent alterations to the peripheral map:
• Control register lock sequence
• Continuous state monitoring
• Configuration bit pin select lock
9.4.4.1
Under normal operation, writes to the RPINRx and
RPORx registers are not allowed. Attempted writes
appear to execute normally, but the contents of the reg-
isters remain unchanged. To change these registers,
they must be unlocked in hardware. The register lock is
controlled by the IOLOCK bit (OSCCON<6>). Setting
IOLOCK prevents writes to the control registers;
clearing IOLOCK allows writes.
To set or clear IOLOCK, a specific command sequence
must be executed:
1.
2.
3.
Unlike the similar sequence with the oscillator’s LOCK
bit, IOLOCK remains in one state until changed. This
allows all of the peripheral pin selects to be configured
with a single unlock sequence followed by an update to
all control registers, then locked with a second lock
sequence.
DS70283B-page 112
Note:
Write 0x46 to OSCCON<7:0>.
Write 0x57 to OSCCON<7:0>.
Clear (or set) IOLOCK as a single operation.
CONTROLLING CONFIGURATION
CHANGES
MPLAB
functions for unlocking the OSCCON
register:
See MPLAB Help for more information.
Peripheral Mapping
Control Register Lock
__builtin_write_OSCCONL(value)
__builtin_write_OSCCONH(value)
®
C30 provides built-in C language
Preliminary
9.4.4.2
In addition to being protected from direct writes, the
contents of the RPINRx and RPORx registers are con-
stantly monitored in hardware by shadow registers. If
an unexpected change in any of the registers occurs
(such as cell disturbances caused by ESD or other
external events), a configuration mismatch Reset will
be triggered.
9.4.4.3
As an additional level of safety, the device can be
configured to prevent more than one write session to
the RPINRx and RPORx registers. The IOL1WAY
(FOSC<IOL1WAY>) configuration bit blocks the
IOLOCK bit from being cleared after it has been set
once. If IOLOCK remains set, the register unlock
procedure will not execute, and the peripheral pin
select control registers cannot be written to. The only
way to clear the bit and re-enable peripheral remapping
is to perform a device Reset.
In the default (unprogrammed) state, IOL1WAY is set,
restricting users to one write session. Programming
IOL1WAY allows user applications unlimited access
(with the proper use of the unlock sequence) to the
peripheral pin select registers.
9.4.5
The ability to control peripheral pin selection introduces
several considerations into application design, includ-
ing several common peripherals that are available only
as remappable peripherals.
9.4.5.1
The main consideration is that the peripheral pin
selects are not available on default pins in the device’s
default (Reset) state. More specifically, since all
RPINRx and RPORx registers reset to 0000h, this
means all peripheral pin select inputs are tied to RP0,
while all peripheral pin select outputs are disconnected.
This means that before any other application code is
executed, the user application must initialize the device
with the proper peripheral configuration.
Since the IOLOCK bit resets in the unlocked state, it is
not necessary to execute the unlock sequence after the
device has come out of Reset. For the sake of applica-
tion safety, however, it is always a good idea to set
IOLOCK and lock the configuration after writing to the
control registers.
The unlock sequence must be executed as an assem-
bly-language routine, in the same manner as changes
to the oscillator configuration, because the unlock
sequence is timing-critical. If the bulk of the application
is written in C or another high-level language, the
unlock sequence should be performed by writing inline
assembler.
CONSIDERATIONS FOR
PERIPHERAL PIN SELECTION
Continuous State Monitoring
Configuration Bit Pin Select Lock
Initialization and Locks
© 2007 Microchip Technology Inc.