DSPIC33FJ32MC202 Microchip Technology Inc., DSPIC33FJ32MC202 Datasheet - Page 287

• Manufacturer Part Number: DSPIC33FJ32MC202
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

PORTC
Power-Saving Features .................................................... 105
Program Address Space ..................................................... 25
Program Memory
Pulse-Width Modulation Mode .......................................... 144
PWM
PWM Dead-Time Generators ........................................... 153
PWM Duty Cycle
PWM Fault Pins ................................................................ 155
PWM Output and Polarity Control ..................................... 155
PWM Special Event Trigger .............................................. 156
PWM Time Base ............................................................... 150
PWM Update Lockout ....................................................... 156
© 2007 Microchip Technology Inc.
Register Map dsPIC33FJ32MC204
Clock Frequency and Switching................................ 105
Construction................................................................ 47
Data Access from Program Memory Using
Data Access from Program Memory Using Table
Data Access from, Address Generation...................... 48
Memory Map ............................................................... 25
Table Read Instructions
Visibility Operation ...................................................... 50
Interrupt Vector ........................................................... 26
Organization................................................................ 26
Reset Vector ............................................................... 26
Center-Aligned .......................................................... 152
Complementary Mode............................................... 153
Complementary Output Mode................................... 154
Duty Cycle................................................................. 144
Edge-Aligned ............................................................ 151
Independent Output Mode ........................................ 154
Operation During CPU Idle Mode ............................. 156
Operation During CPU Sleep Mode.......................... 156
Output Override ........................................................ 154
Output Override Synchronization.............................. 155
Period................................................................ 144, 151
Single Pulse Mode .................................................... 154
Assignment ............................................................... 154
Ranges...................................................................... 154
Selection Bits (table) ................................................. 154
Comparison Units ..................................................... 152
Immediate Updates................................................... 153
Register Buffers ........................................................ 152
Enable Bits................................................................ 155
Fault States............................................................... 155
Input Modes .............................................................. 156
Priority....................................................................... 155
Output Pin Control .................................................... 155
Postscaler ................................................................. 156
Continuous Up/Down Count Modes.......................... 150
Double Update Mode ................................................ 151
Free-Running Mode .................................................. 150
Postscaler ................................................................. 151
Prescaler................................................................... 151
Single-Shot Mode ..................................................... 150
and dsPIC33FJ16MC304 ................................... 40
Program Space Visibility ..................................... 50
Instructions ......................................................... 49
TBLRDH ............................................................. 49
TBLRDL .............................................................. 49
Cycle-by-Cycle.................................................. 156
Latched ............................................................. 156
Preliminary
Q
QEI
Quadrature Encoder Interface (QEI)................................. 169
Quadrature Encoder Interface (QEI) Module
R
Reader Response............................................................. 288
Registers
16-bit Up/Down Position Counter Mode ................... 170
Alternate 16-bit Timer/Counter ................................. 171
Count Direction Status.............................................. 170
Error Checking.......................................................... 170
Interrupts .................................................................. 172
Logic ......................................................................... 170
Operation During CPU Idle Mode............................. 171
Operation During CPU Sleep Mode ......................... 171
Position Measurement Mode.................................... 170
Programmable Digital Noise Filters .......................... 171
Timer Operation During CPU Idle Mode................... 172
Timer Operation During CPU Sleep Mode ............... 171
Register Map .............................................................. 35
AD1CHS0 (ADC1 Input Channel 0 Select................ 213
AD1CHS123 (ADC1 Input Channel 1, 2,
AD1CON1 (ADC1 Control 1) .................................... 207
AD1CON2 (ADC1 Control 2) .................................... 209
AD1CON3 (ADC1 Control 3) .................................... 210
AD1CSSL (ADC1 Input Scan Select Low) ............... 215
AD1PCFGL (ADC1 Port Configuration Low) ............ 215
CLKDIV (Clock Divisor) ............................................ 100
CORCON (Core Control) ...................................... 18, 68
DFLTCON (QEI Control) .......................................... 175
I2CxCON (I2Cx Control)........................................... 189
I2CxMSK (I2Cx Slave Mode Address Mask)............ 193
I2CxSTAT (I2Cx Status) ........................................... 191
ICxCON (Input Capture x Control)............................ 142
IEC0 (Interrupt Enable Control 0) ............................... 77
IEC1 (Interrupt Enable Control 1) ............................... 79
IEC3 (Interrupt Enable Control 3) ............................... 80
IEC4 (Interrupt Enable Control 4) ............................... 81
IFS0 (Interrupt Flag Status 0) ..................................... 72
IFS1 (Interrupt Flag Status 1) ..................................... 74
IFS3 (Interrupt Flag Status 3) ..................................... 75
IFS4 (Interrupt Flag Status 4) ..................................... 76
INTCON1 (Interrupt Control 1) ................................... 69
INTCON2 (Interrupt Control 2) ................................... 71
INTTREG Interrupt Control and Status Register ........ 92
IPC0 (Interrupt Priority Control 0) ............................... 82
IPC1 (Interrupt Priority Control 1) ............................... 83
IPC14 (Interrupt Priority Control 14) ........................... 89
IPC15 (Interrupt Priority Control 15) ........................... 90
IPC16 (Interrupt Priority Control 16) ........................... 90
IPC18 (Interrupt Priority Control 18) ........................... 91
IPC2 (Interrupt Priority Control 2) ............................... 84
IPC3 (Interrupt Priority Control 3) ............................... 85
IPC4 (Interrupt Priority Control 4) ............................... 86
IPC5 (Interrupt Priority Control 5) ............................... 87
IPC7 (Interrupt Priority Control 7) ............................... 88
NVMCON (Flash Memory Control)............................. 53
NVMKEY (Nonvolatile Memory Key) .......................... 54
OCxCON (Output Compare x Control) ..................... 146
OSCCON (Oscillator Control)..................................... 98
OSCTUN (FRC Oscillator Tuning)............................ 102
P1DC2 (PWM Duty Cycle 2) .................................... 166
P1DC3 (PWM Duty Cycle 3) .................................... 167
PDC1 (PWM Duty Cycle 1) ...................................... 166
3 Select) ........................................................... 211
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