DSPIC30F4012 Microchip Technology Inc., DSPIC30F4012 Datasheet - Page 127
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
DSPIC30F4012
Manufacturer Part Number
DSPIC30F4012
Description
Dspic30f4011/4012 Enhanced Flash 16-bit Digital Signal Controller
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC30F4012.pdf
(236 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F4012-20E/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
DSPIC30F4012-20E/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
DSPIC30F4012-20E/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
DSPIC30F4012-20I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
DSPIC30F4012-20I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
DSPIC30F4012-30I/ML
Manufacturer:
CYNTEC
Quantity:
600 000
Company:
Part Number:
DSPIC30F4012-30I/ML
Manufacturer:
Microchip Technology
Quantity:
135
Company:
Part Number:
DSPIC30F4012-30I/SO
Manufacturer:
ON
Quantity:
42 000
Company:
Part Number:
DSPIC30F4012-30I/SP
Manufacturer:
TI
Quantity:
17 600
19.3
The CAN module can operate in one of several
operation modes selected by the user. These modes
include:
• Initialization Mode
• Disable Mode
• Normal Operation Mode
• Listen Only Mode
• Loopback Mode
• Error Recognition Mode
Modes are requested by setting the REQOP<2:0> bits
(C1CTRL<10:8>). Entry into a mode is acknowledged by
monitoring the OPMODE<2:0> bits (C1CTRL<7:5>). The
module will not change the mode and the OPMODE bits
until a change in mode is acceptable, generally during
bus Idle time which is defined as at least 11 consecutive
recessive bits.
19.3.1
In the Initialization mode, the module will not transmit or
receive. The error counters are cleared and the inter-
rupt flags remain unchanged. The programmer will
have access to Configuration registers that are access
restricted in other modes. The module will protect the
user from accidentally violating the CAN protocol
through programming errors. All registers which control
the configuration of the module can not be modified
while the module is online. The CAN module will not be
allowed to enter the Configuration mode while a
transmission is taking place. The Configuration mode
serves as a lock to protect the following registers.
• All Module Control Registers
• Baud Rate and Interrupt Configuration Registers
• Bus Timing Registers
• Identifier Acceptance Filter Registers
• Identifier Acceptance Mask Registers
19.3.2
In Disable mode, the module will not transmit or
receive. The module has the ability to set the WAKIF bit
due to bus activity, however, any pending interrupts will
remain and the error counters will retain their value.
If the REQOP<2:0> bits (C1CTRL<10:8>) = 001, the
module will enter the Disable mode. If the module is
active, the module will wait for 11 recessive bits on the
CAN bus, detect that condition as an Idle bus, then
accept
OPMODE<2:0> bits (C1CTRL<7:5>) = 001, that
indicates whether the module successfully went into
Disable mode. The I/O pins will revert to normal I/O
function when the module is in the Disable mode.
© 2007 Microchip Technology Inc.
Modes of Operation
the
INITIALIZATION MODE
DISABLE MODE
disable
command.
When
the
The module can be programmed to apply a low-pass
filter function to the C1RX input line while the module
or the CPU is in Sleep mode. The WAKFIL bit
(C1CFG2<14>) enables or disables the filter.
19.3.3
Normal
REQOP<2:0> = 000. In this mode, the module is
activated and the I/O pins will assume the CAN bus
functions. The module will transmit and receive CAN
bus messages via the C1TX and C1RX pins.
19.3.4
If the Listen Only mode is activated, the module on the
CAN bus is passive. The transmitter buffers revert to
the port I/O function. The receive pins remain inputs.
For the receiver, no error flags or Acknowledge signals
are sent. The error counters are deactivated in this
state. The Listen Only mode can be used for detecting
the baud rate on the CAN bus. To use this, it is neces-
sary that there are at least two further nodes that
communicate with each other.
19.3.5
The module can be set to ignore all errors and receive
any message. In this mode, the data which is in the
message assembly buffer until the time an error
occurred, is copied in the receive buffer and can be
read via the CPU interface.
19.3.6
If the Loopback mode is activated, the module will
connect the internal transmit signal to the internal
receive signal at the module boundary. The transmit
and receive pins revert to their port I/O function.
Note:
dsPIC30F4011/4012
Operation
Typically, if the CAN module is allowed to
transmit in a particular mode of operation
and a transmission is requested immedi-
ately after the CAN module has been
placed in that mode of operation, the
module waits for 11 consecutive recessive
bits on the bus before starting transmission.
If the user switches to Disable mode within
this 11-bit period, then this transmission is
aborted and the corresponding TXABT bit is
set and TXREQ bit is cleared.
NORMAL OPERATION MODE
LISTEN ONLY MODE
ERROR RECOGNITION MODE
LOOPBACK MODE
mode
is
DS70135E-page 125
selected
when