DSPIC30F4012 Microchip Technology Inc., DSPIC30F4012 Datasheet - Page 165
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DSPIC30F4012
Manufacturer Part Number
DSPIC30F4012
Description
Dspic30f4011/4012 Enhanced Flash 16-bit Digital Signal Controller
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC30F4012.pdf
(236 pages)
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ON
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TI
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TABLE 22-2:
© 2007 Microchip Technology Inc.
Base
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Instr
#
Mnemonic
BTSS
BTST
BTSTS
CALL
CLR
CLRWDT
COM
CP
CP0
CPB
CPSEQ
CPSGT
CPSLT
CPSNE
DAW
DEC
DEC2
DISI
DIV
DIVF
DO
ED
Assembly
BTSS
BTSS
BTST
BTST.C
BTST.Z
BTST.C
BTST.Z
BTSTS
BTSTS.C
BTSTS.Z
CALL
CALL
CLR
CLR
CLR
CLR
CLRWDT
COM
COM
COM
CP
CP
CP
CP0
CP0
CPB
CPB
CPB
CPSEQ
CPSGT
CPSLT
CPSNE
DAW
DEC
DEC
DEC
DEC2
DEC2
DEC2
DISI
DIV.S
DIV.SD
DIV.U
DIV.UD
DIVF
DO
DO
ED
INSTRUCTION SET OVERVIEW (CONTINUED)
f,#bit4
Ws,#bit4
f,#bit4
Ws,#bit4
Ws,#bit4
Ws,Wb
Ws,Wb
f,#bit4
Ws,#bit4
Ws,#bit4
lit23
Wn
f
WREG
Ws
Acc,Wx,Wxd,Wy,Wyd,AWB
f
f,WREG
Ws,Wd
f
Wb,#lit5
Wb,Ws
f
Ws
f
Wb,#lit5
Wb,Ws
Wb, Wn
Wb, Wn
Wb, Wn
Wb, Wn
Wn
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
#lit14
Wm,Wn
Wm,Wn
Wm,Wn
Wm,Wn
Wm,Wn
#lit14,Expr
Wn,Expr
Wm*Wm,Acc,Wx,Wy,Wxd
Assembly Syntax
Bit Test f, Skip if Set
Bit Test Ws, Skip if Set
Bit Test f
Bit Test Ws to C
Bit Test Ws to Z
Bit Test Ws<Wb> to C
Bit Test Ws<Wb> to Z
Bit Test then Set f
Bit Test Ws to C, then Set
Bit Test Ws to Z, then Set
Call subroutine
Call indirect subroutine
f = 0x0000
WREG = 0x0000
Ws = 0x0000
Clear Accumulator
Clear Watchdog Timer
f = f
WREG = f
Wd = Ws
Compare f with WREG
Compare Wb with lit5
Compare Wb with Ws (Wb – Ws)
Compare f with 0x0000
Compare Ws with 0x0000
Compare f with WREG, with Borrow
Compare Wb with lit5, with Borrow
Compare Wb with Ws, with Borrow
(Wb – Ws – C)
Compare Wb with Wn, skip if =
Compare Wb with Wn, skip if >
Compare Wb with Wn, skip if <
Compare Wb with Wn, skip if
Wn = decimal adjust Wn
f = f –1
WREG = f –1
Wd = Ws – 1
f = f – 2
WREG = f – 2
Wd = Ws – 2
Disable Interrupts for k instruction cycles
Signed 16/16-bit Integer Divide
Signed 32/16-bit Integer Divide
Unsigned 16/16-bit Integer Divide
Unsigned 32/16-bit Integer Divide
Signed 16/16-bit Fractional Divide
Do code to PC + Expr, lit14 + 1 time
Do code to PC + Expr, (Wn) +1 time
Euclidean Distance ( no accumulate)
Description
dsPIC30F4011/4012
≠
words
# of
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
cycles
# of
DS70135E-page 163
18
18
18
18
18
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
None
None
Z
C
Z
C
Z
Z
C
Z
None
None
None
None
None
OA, OB, SA, SB
WDTO, Sleep
N, Z
N, Z
N, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
None
None
None
None
C
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
C, DC, N, OV, Z
None
N, Z, C, OV
N, Z, C, OV
N, Z, C, OV
N, Z, C, OV
N, Z, C, OV
None
None
OA, OB, OAB,
SA, SB, SAB
Status Flags
Affected