DSPIC30F6012A Microchip Technology Inc., DSPIC30F6012A Datasheet - Page 154
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DSPIC30F6012A
Manufacturer Part Number
DSPIC30F6012A
Description
Dspic30f6011a/6012a/6013a/6014a High-performance Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC30F6012A.pdf
(238 pages)
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dsPIC30F6011A/6012A/6013A/6014A
REGISTER 20-3:
DS70143C-page 152
bit 23
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 23-16
bit 15-14
bit 13-11
bit 10-8
bit 7-5
bit 4-0
R/P
U-0
U-0
—
—
FCKSM<1:0>
Unimplemented: Read as ‘0’
FCKSM<1:0>: Clock Switching and Monitor Selection Configuration bits
1x = Clock switching is disabled, fail safe clock monitor is disabled
01 = Clock switching is enabled, fail safe clock monitor is disabled
00 = Clock switching is enabled, fail safe clock monitor is enabled
Unimplemented: Read as ‘0’
FOS<2:0>: Oscillator Group Selection on POR bits
111 = PLL Oscillator; PLL source selected by FPR<4:0> bits. See Table 20-2.
011 = EXT: External Oscillator; OSC1/OSC2 pins; External Oscillator configuration selected by
010 = LPRC: Internal Low Power RC
001 = FRC: Internal Fast RC
000 = LPOSC: Low Power Crystal Oscillator; SOSCI/SOSCO pins
Unimplemented: Read as ‘0’
FPR<4:0>: Oscillator Selection within Primary Group bits, see Table 20-2.
R/P
U-0
U-0
—
—
FOSC: OSCILLATOR CONFIGURATION REGISTER
FPR<4:0> bits
W = Writable bit
‘1’ = Bit is set
U-0
U-0
U-0
—
—
—
R/P
U-0
U-0
Preliminary
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
R/P
—
—
FPR<4:0>
U-0
R/P
R/P
—
© 2006 Microchip Technology Inc.
x = Bit is unknown
FOS<2:0>
U-0
R/P
R/P
—
U-0
R/P
R/P
—
bit 16
bit 8
bit 0