DSPIC30F6012A Microchip Technology Inc., DSPIC30F6012A Datasheet - Page 85
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DSPIC30F6012A
Manufacturer Part Number
DSPIC30F6012A
Description
Dspic30f6011a/6012a/6013a/6014a High-performance Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC30F6012A.pdf
(238 pages)
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12.0
This section describes the input capture module and
associated Operational modes. The features provided
by this module are useful in applications requiring fre-
quency (period) and pulse measurement. Figure 12-1
depicts a block diagram of the input capture module.
Input capture is useful for such modes as:
• Frequency/Period/Pulse Measurements
• Additional Sources of External Interrupts
The key operational features of the input capture
module are:
• Simple Capture Event mode
• Timer2 and Timer3 mode selection
• Interrupt on input capture event
FIGURE 12-1:
© 2006 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “dsPIC30F Family Reference
Manual” (DS70046).
ICx pin
Note:
INPUT CAPTURE MODULE
Where ‘x’ is shown, reference is made to the registers or bits associated to the respective input capture
channels 1 through N.
Prescaler
1, 4, 16
INPUT CAPTURE MODE BLOCK DIAGRAM
dsPIC30F6011A/6012A/6013A/6014A
3
ICxCON
Data Bus
Mode Select
ICM<2:0>
ICBNE, ICOV
Synchronizer
Clock
ICI<1:0>
Preliminary
From General Purpose Timer Module
Detection
Logic
Edge
These Operating modes are determined by setting the
appropriate bits in the ICxCON register (where
x = 1,2,...,N). The dsPIC DSC devices contain up to 8
capture channels (i.e., the maximum value of N is 8).
12.1
The simple capture events in the dsPIC30F product
family are:
• Capture every falling edge
• Capture every rising edge
• Capture every 4th rising edge
• Capture every 16th rising edge
• Capture every rising and falling edge
These simple Input Capture modes are configured by
setting the appropriate bits ICM<2:0> (ICxCON<2:0>).
12.1.1
There are four input capture prescaler settings speci-
fied by bits ICM<2:0> (ICxCON<2:0>). Whenever the
capture channel is turned off, the prescaler counter will
be cleared. In addition, any Reset will clear the
prescaler counter.
Interrupt
Logic
Set Flag
Set Flag
ICxIF
ICxIF
Simple Capture Event Mode
CAPTURE PRESCALER
Logic
FIFO
R/W
T2_CNT
ICxBUF
1
16
DS70143C-page 83
0
T3_CNT
16
ICTMR