DSPIC30F6012A Microchip Technology Inc., DSPIC30F6012A Datasheet - Page 163
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DSPIC30F6012A
Manufacturer Part Number
DSPIC30F6012A
Description
Dspic30f6011a/6012a/6013a/6014a High-performance Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC30F6012A.pdf
(238 pages)
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TABLE 20-7:
Note:
TABLE 20-8:
Note:
RCON
OSCCON 0742
OSCTUN 0744
PMD1
PMD2
FOSC
FWDT
FBORPOR
FBS
FSS
FGS
Name
File Name
SFR
Addr
0740 TRAPR IOPUWR BGST LVDEN
0770
0772 IC8MD
.
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
F80000
F80002
F80004
F80006
F80008
F8000A
Addr.
Bit 15
T5MD
—
—
SYSTEM INTEGRATION REGISTER MAP FOR dsPIC30F601XA
DEVICE CONFIGURATION REGISTER MAP
IC7MD
Bit 14
T4MD
Bits 23-16
—
—
—
—
—
—
—
COSC<2:0>
IC6MD IC5MD IC4MD IC3MD IC2MD
Bit 13
T3MD
—
FWDTEN
MCLREN
Bit 15
Bit 12
T2MD
FCKSM<1:0>
—
—
—
—
T1MD
Bit 11
—
—
Bit 14
—
—
—
—
—
Bit 10
—
—
LVDL<3:0>
Bit 13
—
—
—
—
NOSC<2:0>
RBS<1:0>
RSS<1:0>
Bit 9
—
—
Bit 12
—
—
—
—
DCIMD
IC1MD
Bit 8
—
Bit 11
—
—
—
—
—
—
OC8MD OC7MD
I2CMD
EXTR
Bit 7
—
POST<1:0>
Bit 10
—
—
—
—
—
U2MD
SWR
Bit 6
—
FOS<2:0>
SWDTEN
OC6MD
Bit 9
LOCK
U1MD
—
—
—
—
Bit 5
ESS<1:0>
—
Bit 8
EBS
SPI2MD SPI1MD
OC5MD OC4MD OC3MD
—
—
—
WDTO
Bit 4
—
—
BOREN
Bit 7
SLEEP
—
—
—
—
—
Bit 3
CF
Bit 6
C2MD
—
—
—
—
—
—
IDLE
Bit 2
—
TUN<3:0>
Bit 5
FWPSA<1:0>
LPOSCEN OSWEN Depends on Configuration bits.
—
BORV<1:0>
—
—
—
OC2MD
C1MD
Bit 1
BOR
Bit 4
—
—
—
ADCMD
OC1MD
Bit 0
POR
Bit 3
—
—
Depends on type of Reset.
BSS<2:0>
SSS<2:0>
FPR<4:0>
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
Bit 2
—
GSS<1:0>
FWPSB<3:0>
Reset State
Bit 1
FPWRT<1:0>
BWRP
SWRP
GWRP
Bit 0