FIDO1100PQF208IR1 Innovasic Semiconductor Inc., FIDO1100PQF208IR1 Datasheet - Page 65

• Manufacturer Part Number: FIDO1100PQF208IR1
• Description: 32-bit Real-time Communications Controller
• Manufacturer: Innovasic Semiconductor Inc.

Flexible Input Deterministic Output (fido ® )
32-Bit Real-Time Communications Controller
9.2.2 SDRAM Row Activation Timing
Before any READ or WRITE commands can be issued to a bank within the SDRAM, a row in
that bank must be ―opened.‖ This is accomplished via the ACTIVE command, which selects
both the bank and the row to be activated (see Figure 25). After opening a row (issuing an
ACTIVE command), a READ or WRITE command may be issued to that row, subject to the
tRCD specification. The tRCD (MIN) should be divided by the clock period and rounded up to
the next whole number to determine the earliest clock edge after the ACTIVE command on
which a READ or WRITE command can be entered. For example, a tRCD specification of 20ns
with a 125-MHz clock (8-ns period) results in 2.5 clocks, rounded to 3. This is reflected in
Figure 26, which covers any case where 2 < tRCD (MIN)/tCK ≤ 3. (The same procedure is used
to convert other specification limits from time units to clock cycles.)
®
Figure 24. SDRAM CAS Timing
UNCONTROLLED WHEN PRINTED OR COPIED
Page 65 of 81
IA211080807-06
November 20, 2009
http://www.Innovasic.com
Customer Support:
Data Sheet
1-888-824-4184