ia82527 Innovasic Semiconductor Inc., ia82527 Datasheet
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... IA82527 CAN Serial Communications Controller IA82527 Serial Communications Controller—CAN Protocol Data Sheet IA211080504-02 Page Data Sheet March 12, 2009 http://www.Innovasic.com Customer Support: (888) 824-4184 ...
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... IA82527 CAN Serial Communications Controller Copyright Published by Innovasic Semiconductor, Inc. 3737 Princeton Drive NE, Suite 130, Albuquerque, NM 87107 MILES™ trademark Innovasic Semiconductor, Inc. Intel is a registered trademark of Intel Corporation 2009 by Innovasic Semiconductor, Inc. IA211080504-02 Page Data Sheet March 12, 2009 http://www ...
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... IA82527 CAN Serial Communications Controller 1. Introduction .............................................................................................................................6 1.1 General Description .......................................................................................................6 1.2 Features .........................................................................................................................6 2. Packaging, Pin Descriptions, and Physical Dimensions .........................................................8 2.1 Packages and Pinouts ....................................................................................................8 2.1.1 PLCC Package ..................................................................................................9 2.1.2 PLCC Physical Dimensions ............................................................................11 2.1.3 PQFP Package ................................................................................................12 2.1.4 PQFP Physical Dimensions ............................................................................14 2.2 Pin/Signal Descriptions ...............................................................................................15 3. Maximum Ratings, Thermal Characteristics, and DC Parameters .......................................25 4. Functional Description ..........................................................................................................28 4 ...
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... IA82527 CAN Serial Communications Controller Figure 1. PLCC Package Diagram ..................................................................................................9 Figure 2. PLCC Physical Dimensions ..........................................................................................11 Figure 3. PQFP Package Diagram ................................................................................................12 Figure 4. PQFP Physical Dimensions ...........................................................................................14 Figure 5. Functional Block Diagram ............................................................................................28 Figure 6. mosi/miso Connection ...................................................................................................29 Figure 7. Mode 0 and Mode 1: General Bus Timing ...................................................................35 Figure 8. Mode 0 and Mode 1: Ready Timing for Read Cycle ...................................................36 Figure 9 ...
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... IA82527 CAN Serial Communications Controller Table 1. PLCC Pin List .................................................................................................................10 Table 2. PQFP Pin List .................................................................................................................13 Table 3. Pin/Signal Descriptions...................................................................................................15 Table 4. Absolute Maximum Ratings ...........................................................................................25 Table 5. Thermal Characteristics ..................................................................................................25 Table 6. DC Parameters ................................................................................................................26 Table 7. ISO Physical Layer DC Parameters ................................................................................27 Table 8. Address Map ...................................................................................................................31 Table 9. Message Object Structure ...............................................................................................32 Table 10. Mode 0 and Mode 1: General Bus and Ready Timing ................................................34 Table 11 ...
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... The IA82527 can store 15 message objects of 8-byte data length. Each message object can be configured as either transmit or receive except for message object 15, which is receive-only. Message object 15 also provides a special acceptance mask designed to filter message identifiers that are received ...
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... Non-Multiplexed Non-Intel Architecture – Serial (SPI) I/O Ports (2) – 8-Bit – Bidirectional Flexible Interrupt Structure Programmable Clock Output A detailed description of the IA82527, including the features listed above, is provided in Chapter 4, Functional Description. IA211080504-02 Page Data Sheet March 12, 2009 http://www.Innovasic.com ...
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... Packaging, Pin Descriptions, and Physical Dimensions 2.1 Packages and Pinouts The Innovasic Semiconductor IA82527 CAN Serial Communications Controller is available in the following RoHs packages: 44-Pin Plastic Leaded Chip Carrier (PLCC), equivalent to original Intel PLCC package 44-Pin Plastic Quad Flat Pack (PQFP), equivalent to original Intel QFP package ...
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... IA82527 CAN Serial Communications Controller 2.1.1 PLCC Package The pinout for the PLCC Package is as shown in Figure 1. The corresponding pinout is provided in Table 1. Figure 1. PLCC Package Diagram IA211080504-02 Page Data Sheet March 12, 2009 http://www.Innovasic.com Customer Support: (888) 824-4184 ...
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... IA82527 CAN Serial Communications Controller Table 1. PLCC Pin List Pin Name Pin a2/ad2/csas 13 3 a1/ad1/ a0/ad0/icp 15 5 ale/ rd_n wr_n/wrl_n/r-w_n 18 8 cs_n 19 9 dsack0_n 20 10 wrh_n/p2 int_n/p2.6 22 Name Pin Name p2 ss1 p2.4 24 int_n ...
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... IA82527 CAN Serial Communications Controller 2.1.2 PLCC Physical Dimensions The physical dimensions for the PLCC are as shown in Figure 2. Figure 2. PLCC Physical Dimensions Legend: Symbol Min A 0.1650 A1 0.0200 A2 0.1450 A3 0.056 B 0.0130 c 0.0077 D 0.6850 D1 0.6500 D2 0.638 E 0.6850 E1 0.6500 E2 0.638 – n – n1 – p Note: Controlling dimension in inches. ...
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... IA82527 CAN Serial Communications Controller 2.1.3 PQFP Package The pinout for the PQFP Package is as shown in Figure 3. The corresponding pinout is provided in Table 2. Figure 3. PQFP Package Diagram IA211080504-02 Page Data Sheet March 12, 2009 http://www.Innovasic.com Customer Support: (888) 824-4184 ...
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... IA82527 CAN Serial Communications Controller Table 2. PQFP Pin List Pin Name Pin 1 wr_n/wrl_n/r-w_n 12 2 cs_n 13 3 dsack0_n 14 4 wrh_n/p2 int_n/ p2.0 22 Name Pin Name xtal1 23 reset_n xtal2 24 mode1 v 25 ad15/d7/p1.7 ss2 rx1 26 ad14/d6/p1.6 rx0 27 ad13/d5/p1 ...
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... IA82527 CAN Serial Communications Controller 2.1.4 PQFP Physical Dimensions The physical dimensions for the PQFP are as shown in Figure 4. Figure 4. PQFP Physical Dimensions Legend: Symbol Min 0.019 (F) E 0.478 D 0.478 E1 0.390 D1 0.390 c 0.005 B 0.011 CH Note: Controlling dimension in inches. IA211080504-02 Page ...
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... Descriptions of the pin and signal functions for the IA82527 Serial Communications Controller are provided in Table 3. Several of the IA82527 pins have different functions depending on the operating mode of the device. Each of the different signals supported by a pin is listed and defined in Table 3, indexed alphabetically in the first column of the table. Additionally, the name of the pin associated with the signal as well as the pin numbers for both the PLCC and PQFP packages are provided in the “ ...
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... IA82527 is configured to operate in the 8-bit multiplexed non-Intel architecture mode (Mode 2), this signal latches the address into the device during the address phase of the bus cycle. If the IA82527 is configured to operate in Mode 3 (8-bit non-multiplexed non-Intel architecture), this pin must be tied high clock out ...
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... enable. Input. Active High. Mode 3 (synchronous). When the IA82527 is configured to operate in the 8-bit non-multiplexed non-Intel architecture mode (Mode 3), this signal functions as follows: when the CPU reads from or writes to the IA82527, e active high indicates that the address is valid. ...
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... When the MUX bit of the CPU Interface Register is 1, pin 5 functions as the int_n output and pin 18 functions master in slave out. Output (open drain). Serial Interface Mode. When the IA82527 is configured to operate with a serial interface, miso is the serial data output. IA211080504-02 Page Data Sheet ...
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... These pins will be pulled low during reset if unconnected. Following reset, these pins will float master out slave in. Input. Serial Interface Mode. When the IA82527 is configured to operate with a serial interface, mosi is the serial data input. IA211080504-02 Page Data Sheet March 12, 2009 ...
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... IA82527 CAN Serial Communications Controller Table 3. Pin/Signal Descriptions (Continued) Pin Signal Name p1.0 ad8/d0/p1.0 ad9/d1/p1.1 p1.1 ad10/d2/p1.2 p1.2 ad11/d3/p1.3 p1.3 ad12/d4/p1.4 p1.4 ad13/d5/p1.5 p1.5 ad14/d6/p1.6 p1.6 ad15/d7/p1.7 p1.7 PLCC PQFP 38 32 port 1, bit 7–0). Input/Output (general- purpose). Mode 0, Mode 2, and Serial Interface Mode Port 1 bits p1.7–p1.0 can be individually programmed ...
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... P2.7 are selectable and programmable, see Section 4.1.3 I read. Input. Active Low. Mode 0 and Mode 1. When rd_n is asserted (low), it causes the IA82527 to drive the data from the location being read onto the data bus ready. Output (open drain). Active High. Mode 0 and Mode 1 ...
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... When r-w_n is low, it signals a write cycle Receive (rx), lines 0 and 1. Input. Pins rx0 and rx1 are the inputs to the IA82527 from the CAN bus lines These pins connect internally to the receiver input comparator. Serial data from the CAN bus can be ...
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... The IA82527 sends the synchronization bytes after the cs_n signal has been asserted 26 20 Transmit (tx), lines 0 and 1. Output (push-pull). Pins tx0 and tx1 are the outputs from the IA82527 to the 25 19 CAN bus lines. During a recessive bit, tx0 is high and tx1 is low. ...
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... IA82527 internal oscillator. (When an external crystal is used connected between this pin and the xtal2 pin—see next table entry external oscillator or clock source is used to drive the IA82527 instead of a crystal, the xtal1 pin is the input for this clock source Crystal (xtal) 2 ...
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... CAN Serial Communications Controller 3. Maximum Ratings, Thermal Characteristics, and DC Parameters For the Innovasic Semiconductor IA82527 Serial Communications Controller, the absolute maximum ratings, thermal characteristics, and DC parameters are provided in Tables 4 through 6, respectively. Additionally, the DC parameters of the ISO Physical Layer are provided in Table 7. ...
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... IA82527 CAN Serial Communications Controller Table 6. DC Parameters Symbol Parameter V Supply Voltage CC V Voltage, Input Low IL V Voltage, Input Low IL1 V Voltage, Input High IH V Voltage, Input High IH1 V Voltage, Output Low OL V Voltage, Output High OH I Input Leakage Current LEAK ...
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... IA82527 CAN Serial Communications Controller Table 7. ISO Physical Layer DC Parameters Signal Parameter rx0 & rx1, Input Voltage tx0 & tx1 Common Mode Range Differential Input Threshold Delay 1: receive comparator input delay + tx0/tx1 output delay Delay 2: rx0 pin delay (comparator bypassed) + tx0/tx1 output delay ...
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... IA82527 CAN Serial Communications Controller 4. Functional Description 4.1 Hardware Architecture A block diagram of the IA82527 CAN Serial Communications Controller is shown in Figure 5. The primary architectural features of the device are as follows: CAN Controller Message RAM CPU Interface I/O Ports Programmable Clock Output These features are briefly described in the following subsections. ...
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... CAN Serial Communications Controller 4.1.1 CAN Controller The CAN Controller block of the IA82527 supports the interface to the CAN Bus via the rx0, rx1, tx0, and tx1 lines. The CAN Controller manages the transceiver logic, error management logic, and the message objects, controlling the data stream between the Message RAM (parallel data) and the CAN Bus (serial data) ...
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... Using an oscillator, clock divider register, and a driver circuit, the IA82527 provides a programmable clock output. The output frequency range available is from the external crystal frequency to that frequency divided by 15. The clock output allows the IA82527 to drive other devices such as the host CPU. The slew rate of the clkout signal is selectable via the CLKOUT Register (1FH) ...
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... IA82527 CAN Serial Communications Controller Table 8. Address Map Address Register/Message 00H Control Register 01H Status Register 02H CPU Interface Register 03H Reserved 04–05H High-Speed Read Register 06–07H Global Mask—Standard 08–0BH Global Mask—Extended 0C-0FH Message 15 Mask 10–1EH Message 1 1FH CLKOUT Register 20– ...
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... IA82527 CAN Serial Communications Controller Table 9. Message Object Structure Offset (Base Address +n) Message Component +0 Control Register 0 +1 Control Register 1 +2 Arbitration Register 0 +3 Arbitration Register 1 +4 Arbitration Register 2 +5 Arbitration Register 3 +6 Message Configuration Register +7 Data Byte 0 +8 Data Byte 1 +9 Data Byte 2 ...
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... IA82527 CAN Serial Communications Controller 5. AC Specifications The AC characteristics of the IA82527 are provided in the figures and tables of this chapter. The IA82527 can be configured to operate in the following parallel and serial CPU interface modes: Mode 0: 8-Bit Multiplexed Intel Architecture Mode 1: 16-Bit Multiplexed Intel Architecture ...
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... IA82527 CAN Serial Communications Controller Table 10. Mode 0 and Mode 1: General Bus and Ready Timing Symbol 1/t Oscillator Frequency XTAL 1/t System Clock Frequency SCLK 1/t Memory Clock Frequency MCLK t Address Valid to ale Low AVLL t Address Hold after ale Low LLAX t ale High Time LHLL ...
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... IA82527 CAN Serial Communications Controller Figure 7. Mode 0 and Mode 1: General Bus Timing IA211080504-02 Page Data Sheet March 12, 2009 http://www.Innovasic.com Customer Support: (888) 824-4184 ...
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... IA82527 CAN Serial Communications Controller Figure 8. Mode 0 and Mode 1: Ready Timing for Read Cycle Figure 9. Mode 0 and Mode 1: Ready Timing for Write Cycle with No Write Pending IA211080504-02 Page Data Sheet March 12, 2009 http://www.Innovasic.com Customer Support: (888) 824-4184 ...
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... IA82527 CAN Serial Communications Controller Figure 10. Mode 0 and Mode 1: Ready Timing for Write Cycle with Write Active IA211080504-02 Page Data Sheet March 12, 2009 http://www.Innovasic.com Customer Support: (888) 824-4184 ...
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... IA82527 CAN Serial Communications Controller Table 11. Mode 2: General Bus Timing Symbol 1/t Oscillator Frequency XTAL 1/t System Clock Frequency SCLK 1/t Memory Clock Frequency MCLK t Address Valid to as Low AVSL t Address Hold after as Low SLAX t Data Float after e Low ELDZ t e High to Data Valid for Registers 02H, 04H, 05H ...
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... IA82527 CAN Serial Communications Controller Figure 11. Mode 2: General Bus Timing IA211080504-02 Page Data Sheet March 12, 2009 http://www.Innovasic.com Customer Support: (888) 824-4184 ...
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... IA82527 CAN Serial Communications Controller Table 12. Mode 3: Asynchronous Operation Timing Symbol 1/t Oscillator Frequency XTAL 1/t System Clock Frequency SCLK 1/t Memory Clock Frequency MCLK t Address or r-w_n Valid to cs_n Low Setup AVCL t cs_n Low to Data Valid (for High-Speed Registers 02H, 04H, CLDV and 05H) ...
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... IA82527 CAN Serial Communications Controller Figure 12. Mode 3: Asynchronous Operation, Read Cycle IA211080504-02 Page Data Sheet March 12, 2009 http://www.Innovasic.com Customer Support: (888) 824-4184 ...
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... IA82527 CAN Serial Communications Controller Figure 13. Mode 3: Asynchronous Operation, Write Cycle IA211080504-02 Page Data Sheet March 12, 2009 http://www.Innovasic.com Customer Support: (888) 824-4184 ...
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... IA82527 CAN Serial Communications Controller Table 13. Mode 3: Synchronous Operation Timing Symbol 1/t Oscillator Frequency XTAL 1/t System Clock Frequency SCLK 1/t Memory Clock Frequency MCLK t e High to Data Valid (for High-Speed Registers 02H, EHDV 04H, and 5H) e High to Data Valid (for Low-Speed Registers) Read ...
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... IA82527 CAN Serial Communications Controller Figure 14. Mode 3: Synchronous Operation, Read Cycle Timing IA211080504-02 Page Data Sheet March 12, 2009 http://www.Innovasic.com Customer Support: (888) 824-4184 ...
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... IA82527 CAN Serial Communications Controller Figure 15. Mode 3: Synchronous Operation, Write Cycle Timing IA211080504-02 Page Data Sheet March 12, 2009 http://www.Innovasic.com Customer Support: (888) 824-4184 ...
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... IA82527 CAN Serial Communications Controller Table 14. Serial Interface Mode Timing Symbol sclk Serial Port Interface Clock t 1/sclk CYC t Minimum Clock High Time SKHI t Minimum Clock Low Time SKLO t Enable Lead Time LEAD t Enable Lag Time LAG t Access Time ACC t Maximum Data Out Delay Time ...
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... IA82527 CAN Serial Communications Controller Figure 16. Serial Interface Mode: icp = 0 and Figure 17. Serial Interface Mode: icp = 1 and IA211080504-02 Page Data Sheet March 12, 2009 http://www.Innovasic.com Customer Support: (888) 824-4184 ...
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... Table 15 cross-references the current Innovasic part number with the corresponding Intel part number. Table 15. Innovasic Part Number Cross-Reference Innovasic Part Number Intel Part Number IA82527PQF44AR2 AS82527 (lead free–RoHS) AS82527F8 QE82527 IA82527PLC44AR2 AN82527 (lead free–RoHS) AN82527F8 QX82527 TN82527 EN82527 Other packages and temperature grades may also be available. Package Type Temperature Grades ...
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... Problem: High asserted CS_N in SPI mode does not work. In SPI mode, if signal AD2/CSAS is configured for active high chip select Description: (strapped to logic 1 at the rising edge of reset), the IA82527 will not read and write to register 0x02 CPU interface register. This will prevent proper configuration and operation of the chip. Workaround: The workaround to using SPI interface mode is to use the low-active chip select configuration ...
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... IA82527 CAN Serial Communications Controller Description: When the RXIE bit (Bits 3-2) of Msg Box 1 Control_0 register (0x10) is set, and the IE bit (Bit [1]) of the control register (0x00) is set, and any valid CAN bus message is seen and acknowledged by the chip, a Msg Box 1 interrupt will be improperly generated. ...
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... Any receive or transmit causes both the RXOK and TXOK bits of the Status Register (0x01 updated, potentially resulting in a previously set TXOK or RXOK bit being cleared. Although the IA82527 may set these bits, only the CPU should clear them. None. Workaround: Errata No ...
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... Table 16. Revision History Date Revision August 12, 2008 00 August 25, 2008 01 March 12, 2009 02 Description First edition released. Errata No. 5 added. IA82527 - Rev 2 part marking and cross reference information added; Errata No. 6 added. IA211080504-02 Page Data Sheet March 12, 2009 Page(s) NA 49, 50 48, 49, 51 http://www.Innovasic.com ...
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... CAN Serial Communications Controller 9. For Further Information The Innovasic Semiconductor IA82527 Controller Area Network (CAN) Serial Communications Controller is a form, fit, and function replacement for the original Intel Communications Controller. The Innovasic Support Team wants our information to be complete, accurate, useful, and easy to understand ...