FIDO1100 Innovasic Semiconductor Inc., FIDO1100 Datasheet
FIDO1100
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FIDO1100 Summary of contents
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... Flexible Input Deterministic Output (fido 32-Bit Real-Time Communications Controller The fido1100 Data Sheet for the ® 32-Bit Real-Time Communications Controller ® ® ) ® IA211080807-07 UNCONTROLLED WHEN PRINTED OR COPIED Page Data Sheet April 15, 2010 http://www.Innovasic.com Customer Support: 1-888-824-4184 ...
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... Flexible Input Deterministic Output (fido 32-Bit Real-Time Communications Controller Copyright Published by Innovasic Semiconductor, Inc. 3737 Princeton Drive NE, Suite 130, Albuquerque, NM 87107 ® ® fido , fido1100 , and SPIDER 2 C™ Bus is a trademark of Philips Electronics N.V. I Motorola is a registered trademark of Motorola, Inc. ® ® ...
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Flexible Input Deterministic Output (fido 32-Bit Real-Time Communications Controller List of Figures ..................................................................................................................................5 List of Tables ...................................................................................................................................6 1. Overview .................................................................................................................................7 2. Features ...................................................................................................................................9 2.1 Core CPU ....................................................................................................................10 2.2 JTAG ...........................................................................................................................10 2.3 Internal Memory and Memory Management ..............................................................11 2.4 External Bus ...
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Flexible Input Deterministic Output (fido 32-Bit Real-Time Communications Controller 8.2 General Setup and Hold Timing ..................................................................................57 8.3 External Bus Timing ...................................................................................................58 9. Setup and Hold Timing .........................................................................................................59 9.1.1 External Bus Timing for a 32-Bit Transfer (without RDY_N) ......................61 9.1.2 External ...
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... Flexible Input Deterministic Output (fido 32-Bit Real-Time Communications Controller Figure 1. Block Diagram for the fido1100......................................................................................8 Figure 2. PQFP Package Diagram ................................................................................................17 Figure 3. PQFP Physical Package Dimensions.............................................................................24 Figure 4. BGA 10- by 10-mm Package Diagram .........................................................................26 Figure 5. BGA 10- by 10-mm Physical Package Dimensions ......................................................33 Figure 6. BGA 15- by 15-mm Package Diagram .........................................................................35 Figure 7. BGA 15- by 15-mm Physical Package Dimensions ......................................................42 Figure 8 ...
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Flexible Input Deterministic Output (fido 32-Bit Real-Time Communications Controller Table 1. Key Features .....................................................................................................................7 Table 2. Test Pin Descriptions ......................................................................................................11 Table 3. PQFP Pin Listing ............................................................................................................18 Table 4. BGA 10- by 10-mm Package Pin Listing .......................................................................27 Table 5. BGA 15- ...
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... Real-Time Communications Controller 1. Overview Innovasic Semiconductor’s fido1100 is the first product in the fido family of real-time communication controllers. The fido communication controller architecture is uniquely optimized for solving memory bottlenecks, and is designed from the ground up for deterministic processing. Critical timing parameters, such as context switching and interrupt latency, are precisely predictable for real-time tasks ...
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... DMA Core CPU Priority Control Execution Unit Peripheral Management Unit and Frame Buffers UIC_0 UIC_1 UIC0[17:0] UIC1[17:0] Figure 1. Block Diagram for the fido1100 IA211080807-07 UNCONTROLLED WHEN PRINTED OR COPIED Page RREM and MPU INT[7:0] SPIDER™ Debug Context Manager SRAM Timers ...
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... Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 2. Features The fido1100 communication controller’s features include: 32-bit Core CPU CISC architecture optimized for real time CPU32+ (Motorola® 68000) instruction-set compatible Five hardware contexts, each with its own register set and interrupt vector table ...
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... Execution Unit, each of the five hardware contexts in the fido1100 has its own register set, execution priority and exception vector table. From an application’s view, this unique feature of the fido1100 allows it to operate as five independent machines in one: 32-bit address and data paths on-chip 66-MHz operation Instruction execution from external memory or fast internal memory ...
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... In Test Clock Input—All JTAG commands and serial data are synchronized by this signal. The JTAG Interface is used for controlling the SPIDER Debug Features of the fido1100. Breakpoints—Eight hardware context-aware breakpoints that can be chained to set up if/then triggering conditions. – Hardware breakpoints are enabled in software or over JTAG Watchpoints— ...
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... Executes read, write, pre-charge, auto refresh, power down, and initialize SDRAM modes – Fixed, 4-word bursts to/from SDRAM interface – Periodically issues auto refresh command to prevent SDRAM data loss External Bus Arbitration—The fido1100 provides signals to allow it to operate in a multi- bus master environment. 2.5 PMU/UIC/CPU DMA The PMU, UIC, and CPU DMA work together as a fast data transport scheme that requires minimal Core CPU overhead or intervention ...
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... Internal Peripherals The fido1100 incorporates the following set of internal peripherals: 2.6.1 Timer Counter Units (TCU) Two Timer Counter Units (TCU)—The fido1100 is equipped with two Timer Counter Units. – Four channels per timer; any channel can be either input capture or output compare. – Input captures can be either rising or falling edge. ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 2.6.2 Analog-to-Digital Converter (ADC) – 8-channel, 10-bit ADC – Maximum throughput rate of 200 Kbps – High- and low-reference voltage pins ensure accuracy and temperature compensation – Very low ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 3. Libraries and Support Tools Full library support UIC libraries Embedded communication stacks TCP/IP GPIO sample programs Customized GNU tool set Eclipse IDE Sourcery G++ from Code Sourcery ® ...
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... Real-Time Communications Controller 4. Packaging, Pin Descriptions, and Physical Dimensions Information on the packages and pin descriptions for the fido1100 communication controller PQFP, BGA 10- by 10-mm package, and BGA 15- by 15-mm package is provided individually. Refer to sections, figures, and tables for information on the device of interest. ...
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... Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 4.1 PQFP Package 4.1.1 PQFP Pinout The pinout for the fido1100 communication controller PQFP package is as shown in Figure 2. The corresponding pinout is provided in Table 3. ® Figure 2. PQFP Package Diagram IA211080807-07 UNCONTROLLED WHEN PRINTED OR COPIED ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 3. PQFP Pin Listing Pin Signal Name Type 1 AN_7 Input 2 AN_6 Input 3 AN_5 Input 4 AN_4 Input 5 AN_3 Input 6 AN_2 Input 7 AN_1 ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 3. PQFP Pin Listing (Continued) Pin Signal Name 36 D12 Bidirectional External Bus Interface data Bit [12] 37 VDDIO 38 D13 Bidirectional External Bus Interface data Bit [13] ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 3. PQFP Pin Listing (Continued) Pin Signal Name Type 75 VDDC Power 76 A12 Output 77 A13 Output 78 A14 Output 79 A15 Output 80 VDDC Power 81 ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 3. PQFP Pin Listing (Continued) Pin Signal Name Type 109 UIC0_2 Bidirectional Universal I/O Controller 0, pin 2 110 UIC0_3 Bidirectional Universal I/O Controller 0, pin 3 111 ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 3. PQFP Pin Listing (Continued) Pin Signal Name Type 148 GND Ground 149 UIC1_15 Bidirectional Universal I/O Controller 1, pin 15 150 UIC1_16 Bidirectional Universal I/O Controller 1, ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 3. PQFP Pin Listing (Continued) Pin Signal Name Type 187 VDDIO Power 188 UIC3_10 Bidirectional Universal I/O Controller 3 pin 10 189 UIC3_11 Bidirectional Universal I/O Controller 3 ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 4.1.2 PQFP Physical Dimensions The physical dimensions for the 208-pin PQFP package are as shown in Figure 3. Legend: Symbol ...
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... Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 4.2 BGA 10- by 10-mm Package 4.2.1 BGA 10- by 10-mm Pinout The pinout for the fido1100 communication controller BGA 10- by 10-mm package is as shown in Figure 4. The corresponding pinout is provided in Table 4. ® IA211080807-07 UNCONTROLLED WHEN PRINTED OR COPIED Page ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller T1IC2_ A T1IN T0IN T1OC2 T1IC1_ B AN_7 AN_6 T1IC3_T1OC3 T1OC1 T1IC0_ C AN_5 AN_4 AN_2 T1OC0 D AN_3 AN_1 VRL E AN_0 VRH INT1 ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 4. BGA 10- by 10-mm Package Pin Listing Pin Signal Name B1 AN_7 B2 AN_6 C1 AN_5 C2 AN_4 D1 AN_3 C3 AN_2 D2 AN_1 E1 AN_0 D3 ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 4. BGA 10- by 10-mm Pin Listing (Continued) Pin Signal Name N1 D12 Bidirectional External Bus Interface data Bit [12] G12 VDDIO M2 D13 Bidirectional External Bus Interface ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 4. BGA 10- by 10-mm Pin Listing (Continued) Pin Signal Name T8 A11 Output G11 VDDC U8 A12 Output V9 A13 Output T9 A14 Output U9 A15 Output ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 4. BGA 10- by 10-mm Pin Listing (Continued) Pin Signal Name U18 UIC0_0 Bidirectional Universal I/O Controller 0, pin 0 T17 UIC0_1 Bidirectional Universal I/O Controller 0, pin ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 4. BGA 10- by 10-mm Pin Listing (Continued) Pin Signal Name F17 UIC1_12 Bidirectional Universal I/O Controller 1, pin 12 D16 UIC1_13 Bidirectional Universal I/O Controller 1, pin ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 4. BGA 10- by 10-mm Pin Listing (Continued) Pin Signal Name B10 UIC3_6 Bidirectional Universal I/O Controller 3 pin 6 C9 UIC3_7 Bidirectional Universal I/O Controller 3 pin ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 4.2.2 BGA 10- by 10-mm Physical Package Dimensions The physical dimensions for the BGA 10- by 10-mm package are as shown in Figure 5. Legend: Dimension in mm Symbol ...
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... Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 4.3 BGA 15- by 15-mm Package 4.3.1 BGA 15- by 15-mm Pinout The pinout for the fido1100 communication controller BGA 15- by 15-mm package is as shown in Figure 6. The corresponding pinout is provided in Table 5. ® IA211080807-07 UNCONTROLLED WHEN PRINTED OR COPIED Page ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller T1IC1_ T0IC2_ T0IC0_ A UIC3_15 T1OC1 T0OC2 T0OC0 T1IC2_ T1IC0_ T0IC1_ B AN_2 T1OC2 T1OC0 T0OC1 T1IC3_ C AN_0 AN_5 T0IN T1OC3 D VDDA AN_1 ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 5. BGA 15- by 15-mm Package Pin Listing Pin Signal Name F4 AN_7 D3 AN_6 C2 AN_5 G4 AN_4 E3 AN_3 B1 AN_2 D2 AN_1 C1 AN_0 F3 ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 5. BGA 15- by 15-mm Package Pin Listing (Continued) Pin Signal Name P1 D12 Bidirectional External Bus Interface data Bit [12] D11 VDDIO N2 D13 Bidirectional External Bus ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 5. BGA 15- by 15-mm Package Pin Listing (Continued) Pin Signal Name T8 A11 D9 VDDC U8 A12 U9 A13 T9 A14 R9 A15 H4 VDDC U10 A16 ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 5. BGA 15- by 15-mm Package Pin Listing (Continued) Pin Signal Name P15 UIC0_0 Bidirectional Universal I/O Controller 0, pin 0 T17 UIC0_1 Bidirectional Universal I/O Controller 0, ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 5. BGA 15- by 15-mm Package Pin Listing (Continued) Pin Signal Name C17 UIC1_12 Bidirectional Universal I/O Controller 1, pin 12 D16 UIC1_13 Bidirectional Universal I/O Controller 1, ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 5. BGA 15- by 15-mm Package Pin Listing (Continued) Pin Signal Name C9 UIC3_6 Bidirectional Universal I/O Controller 3 pin 6 A8 UIC3_7 Bidirectional Universal I/O Controller 3 ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 4.3.2 BGA 15- by 15-mm Physical Package Dimensions The physical dimensions for the BGA 15- by 15-mm package are as shown in Figure 7. Legend: Dimension in mm Symbol ...
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... BGA 15- by 15-mm Signal Routing The 15- by15-mm BGA can be easily routed using economical and readily available PCB fabrication design rules. In order to route all signals from the fido1100 BGA, 2 layers in addition to power and ground are required, using 0.1mm trace/space technology. Since 0.1mm = 3.937mil, most PCB fabricators will consider this 4mil trace/space. ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Figure 8. BGA 15- by 15-mm Signal Routing ® IA211080807-07 UNCONTROLLED WHEN PRINTED OR COPIED Page Data Sheet April 15, 2010 http://www.Innovasic.com Customer Support: 1-888-824-4184 ...
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... Tables and 10 provide analog power and ground signals, crystal oscillator power and ground signals, 2.5 VDC digital core power signals, 3.3 VDC digital IO power signals, and digital ground signals, respectively. The recommended bypass capacitors for the fido1100 are: Use a mix of 0.1 µf and 0.01 µf capacitors. Bypass capacitors should be located as close as possible to power pins they are connected to ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 9. 3.3 VDC Digital IO Power Signals BGA BGA PQFP Signal Name 22 G9 D10 37 G12 D11 65 K7 D12 85 ...
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... Digital I/O supply voltage DDIO V Analog input voltage with respect to ground AIN T Ambient temperature A T Storage temperature S Note: Operation of the fido1100 outside of maximum operating ratings may result in failure of the device. Table 12. ESD and Latch-Up Characteristics Symbol Parameter Name V Human body model HBM V Machine model MM I ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 14. DC Characteristics – and + DDC Symbol Parameter Name V Input high voltage IH V Input low voltage IL ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 6. Thermal Characteristics Thermal resistance represents the capability package to carry out the heat inside an IC chip complex function of package structure, ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Air Flow (m/s) PQFP Package 35.8 BGA 47.6 BGA Figure 9. Thermal ...
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... D SMP Sample rate Notes: 1. The ADC in the fido1100 uses its own VDD (VDDA) and GND (GNDA) connections along with VREF High (VRH) and VREF Low (VRL) signals. 2. VRH must be less than or equal to VDDA. 3. VRL must be greater than or equal to GNDA ensure maximum conversion accuracy, VDDA, GNDA, VRH, and VRL should be as clean and free of noise as possible ...
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... Signal Considerations and Reset Timing The fido1100 requires the RESET_N signal to be asserted LOW for a minimum of 100 µS after VDDIO and VDDC are at their nominal values and stable. The RESET_N signal must have a rise time of less than 100 nS. Table 21 presents the hardware signals involved or affected and should be considered when asserting reset ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller The RESET_OUT_N signal is driven low for the determined clock delay Figures 9 and 10 present the reset timing and extended reset timing diagrams, respectively. The A_26_SIZE signal is ...
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... Real-Time Communications Controller The following multiplexed signals are tri-stated during reset and should be pulled high if being used as chip selects or pulled low if being used as address lines (the fido1100 boots at address 0x00000000). If not being used, they can be pulled either high or low. A27_CS7_N ...
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... Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller GNDCLK XTAL1 fido1100 XTAL0 2.5V VDDCLK Figure 12. Driven Clock Source fido1100 ® GNDCLK Not Connected fido1100 External Clock Source Figure 13. Crystal Oscillator Third Overtone Off-Chip Components GNDCLK C2 XTAL1 Crystal C1 XTAL0 2.5V VDDCLK Figure 14. Crystal Oscillator ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 7.5 Off-Chip Component Value Table 22 shows the suggested off-chip component values: Table 22. Suggested Off-Chip Component Values Operating frequency C1 C2 36pF 36pF 0.1µF 330nH 66MHz 20 MHZ ...
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... For definitions of registers that control external bus timing and the SDRAM timing, please see The fido1100 User Guide. The external address bus of the fido1100 is 31-bit, and the external data bus is configurable to support either 16-bit bus. In this section, timing diagrams are provided for the ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 8.3 External Bus Timing Signals listed on the External Bus Timing diagrams are described below. TwWAIT – If RDY_ENABLE=0, specifies the width of the chip select active period for ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 9. Setup and Hold Timing All timing delays are characterized at the 50% to 50% point. This includes propagation delay times through combinatorial functions as well as setup, hold-time, ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Hold Time—The minimum time that input data must remain unchanged subsequent to an active clock transition (see Figure 16). Hold = 2ns. Recovery Time—The minimum time that the Set ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Minimum Pulse Width—The minimum length of time between the leading and trailing edges of a pulse (see Figure 19). Timings are based on a 66-MHz clock yielding 15-ns cycles. ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Figure 21. External Bus Timing for a Single, 32-Bit Cycle (without RDY_N) The write-cycle timing is controlled by TwWAIT setting (shown as TxWAIT in the diagram), 1–16 clocks. The ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Figure 22. External Bus Timing for a 32-Bit Transfer (with RDY_N) The TxWAIT setting determines when first to start sampling the low active RDY_N line (labeled with an arrow ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller The write-enable signal (WE_N) goes inactive (hi) 0–3 clocks (TWER) before the end of the chip-select time. 9.1.3 External Bus Timing for 8-Bit/16-Bit Transfer (without RDY_N) This timing is ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller The output-enable signal (OE_N) goes active (low) 0–3 clocks (TOE) after the chip select. The output-enable signal (OE_N) goes inactive (hi) coincident with the chip select. This is also ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller In the case of a write transfer, once the low active RDY_N line is first sampled low (labeled with an arrow marked ―2‖ in the diagram), the write cycle ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 9.2.2 SDRAM Row Activation Timing Before any READ or WRITE commands can be issued to a bank within the SDRAM, a row in that bank must be ―opened.‖ This ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Figure 26. Specific Row Activation Timing Figure 27. Meeting tRCD (min) When 2 < tRCD (min)/tCK ≤ 3 ® IA211080807-07 UNCONTROLLED WHEN PRINTED OR COPIED Page ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 9.2.3 SDRAM Read Operation Timing READ bursts are initiated with a READ command. The starting column and bank addresses are provided with the READ command, and auto precharge is ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller longer burst that is being truncated. The new READ command should be issued x cycles before the clock edge at which the last desired data element is valid, where ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller being accessed is precharged at the completion of the burst. For the generic WRITE commands used in the following illustrations, auto precharge is disabled. During WRITE bursts, the first ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Figure 31. SDRAM Write Burst Timing Figure 32. SDRAM Write-to-Write Timing ® IA211080807-07 UNCONTROLLED WHEN PRINTED OR COPIED Page Data Sheet April 15, 2010 http://www.Innovasic.com Customer ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Figure 33. SDRAM Write-to-Precharge Timing ® IA211080807-07 UNCONTROLLED WHEN PRINTED OR COPIED Page Data Sheet April 15, 2010 http://www.Innovasic.com Customer Support: 1-888-824-4184 ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 10. JTAG The TAP controller is a synchronous Finite State Machine and responds to changes in the TMS and TCK signals. States transition occurs on the rising edge of ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Input Mux TDI TMS TCK TDO Figure 35. JTAG Port Register Interface The timing of the JTAG signals is shown in Figure 35. The TDO pin remains in the ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Table 23. Debug Scan Chain Commands Supported by the JTAG TAP JTAG Instruction Scan Chain Function 00010000 READWRITEADDRCMD (Read/Write Memory/Registers Address and Command) 00010001 READDATA (Read Memory/Registers Data) 00010010 ...
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... Ordering Information The packages (part numbers) currently available are listed in Table 24. Table 24. Part Numbers by Package Types Innovasic Part Number fido1100PQF208IR1 Lead-free (RoHS-compliant) fido1100BGA208IR1 Lead-free (RoHS-compliant) fido1100BGB208IR1 Lead-free (RoHS-compliant) ® Package Type Temperature Grade 208-Lead QFP 28- by 28-mm Package 208-Ball BGA, .5mm pitch 10- by 10-mm Package 208-Ball BGA, ...
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... User Guide and The fido1100 Instruction Set Reference Guide to circumvent problems during the design process and is not intended as a standalone design guide. Although fido1100-specific terms are clearly described, in the interest of conciseness, many terms already familiar to designers and developers are left undefined. ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller An ADC interrupt will be issued if ADC interrupts are enabled. ADC interrupts are enabled by setting ADC Control Register Bit 3 (IRQ_En ADC Data Available Register ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller The Master context will be moved to the ready state, with no modification of its program counter, thus it will start running from where it left off previously. All ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller Errata No. 4 Problem: When using the RDY_N signal to insert wait states (chip select timing register RDY_ENABLE bit = 1), the Address bus timing is incorrect. Description: When ...
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Flexible Input Deterministic Output (fido ® ) 32-Bit Real-Time Communications Controller 13. Revision History Table 26 presents the sequence of revisions to document IA211080807. Table 26. Revision History Date Revision August 8, 2007 00 September 11, 2008 01 October 9, ...
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... Software Profiling and Integrated Debug EnviRonment (SPIDER ) has extensive real-time code debug capabilities without the burden of code instrumentation. The fido1100 User Guide and The fido1100 Instruction Set Reference Guide as well as other helpful tools and files are available. For example, the GDB debugger supports both profiling and tracing of executing code ...