ADN2817 Analog Devices, Inc., ADN2817 Datasheet - Page 12

• Manufacturer Part Number: ADN2817
• Description: Continuous Rate 10 Mbps To 2.7gb/s Clock And Data Recovery Ics
• Manufacturer: Analog Devices, Inc.

ADN2817/ADN2818
I
2
C INTERFACE TIMING AND INTERNAL REGISTER DESCRIPTION
SCK
SDA
START BIT
S
S = START BIT
A(S) = ACKNOWLEDGE BY SLAVE
S
SLAVE ADDR, LSB = 0 (WR)
A6
SLAVE ADDRESS
SCK
SDA
A5
S
t
F
SLADDR[4:0]
S SLAVE ADDR, LSB = 0 (WR) A(S)
t
LOW
t
MSB = 1 SET BY
HD;STA
1
A(S)
t
PIN 19
SLAVE ADDRESS [6:0]
SUB ADDR
HD;DAT
t
R
A5
WR
t
SU;DAT
Figure 18. Slave Address Configuration
Figure 21. I
Figure 22. I
P = STOP BIT
A(M) = ACKNOWLEDGE BY MASTER
Figure 19. I
Figure 20. I
0
ACK
A(S)
Rev. 0 | Page 12 of 36
t
SUB ADDR
SUB ADDRESS
S
HIGH
t
2
F
2
0
2
C Data Transfer Timing
C Port Timing Diagram
2
SLAVE ADDR, LSB = 1 (RD)
A7
C Write Data Transfer
C Read Data Transfer
SUB ADDR[6:1]
t
SU;STA
0
A(S)
DATA
0
S
A0
A(S)
A(M) = LACK OF ACKNOWLEDGE BY MASTER
t
SU;STO
0
A(S) DATA A(M)
t
HD;STA
ACK
0 = WR
1 = RD
R/W
CTRL.
DATA
X
D7
DATA
P
A(S)
DATA[6:1]
t
BUF
t
P
R
S
DATA
A(M)
D0
P
ACK
STOP BIT
P