MBM29LV002TC-70 Meet Spansion Inc., MBM29LV002TC-70 Datasheet - Page 22

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MBM29LV002TC-70

Manufacturer Part Number
MBM29LV002TC-70
Description
Flash Memory Cmos 2m 256k ? 8 Bit
Manufacturer
Meet Spansion Inc.
Datasheet
22
MBM29LV002TC
DQ
Toggle Bit II
*1 : Performing successive read operations from any address will cause DQ
*2 : Reading the byte address being programmed while in the erase-suspend program mode will indicate logic “1”
RY/BY
Ready/Busy
Program
Erase
Erase-Suspend Read
(Erase-Suspended Sector) *
Erase-Suspend Program
This Toggle bit II, along with DQ
Algorithm or in Erase Suspend.
Successive reads from the erasing sector will cause DQ
devices are in the erase-suspended-read mode, successive reads from the erase-suspended sector will cause
DQ
address of the non-erase suspended sector will indicate a logic “1” at the DQ
DQ
Program operation is in progress. The behavior of these two status bits, along with that of DQ
as follows:
For example, DQ
(DQ
and “ (12) DQ
Furthermore, DQ
mode, DQ
The MBM29LV002TC/BC provide a RY/BY open-drain output pin as a way to indicate to the host system that
the Embedded Algorithms are either in progress or has been completed. If the output is low, the devices are
busy with either a program or erase operation. If the output is high, the devices are ready to accept any read/
write or erase operation. When the RY/BY pin is low, the devices will not accept any additional program or erase
commands with the exception of the Erase Suspend command. If the MBM29LV002TC/BC are placed in an
Erase Suspend mode, the RY/BY output will be high, by means of connecting with a pull-up resister to V
During programming, the RY/BY pin is driven low after the rising edge of the fourth write pulse. During an erase
operation, the RY/BY pin is driven low after the rising edge of the sixth write pulse. The RY/BY pin will indicate
a busy condition during the RESET pulse. Refer to “ (8) RY/BY Timing Diagram during Program/Erase
Operations” and “ (9) RESET/RY/BY Timing Diagram” in ■ TIMING DIAGRAM for a detailed timing diagram.
The RY/BY pin is pulled high in standby mode.
Since this is an open-drain output, RY/BY pins can be tied together in parallel with a pull-up resistor to V
2
at the DQ
2
6
2
to toggle. When the devices are in the erase-suspended-program mode, successive reads from the byte
is different from DQ
toggles while DQ
2
2
toggles if this bit is read from an erasing sector.
Mode
bit. However, successive reads from the erase-suspended sector will cause DQ
2
vs.DQ
2
2
and DQ
can also be used to determine which sector is being erased. When the device is in the erase
6
” in ■ TIMING DIAGRAM.
6
does not.) See also “Hardware Sequence Flags” in ■ FUNCTIONAL DESCRIPTION
2
in that DQ
1
6
can be used together to determine if the erase-suspend-read mode is in progress.
-70/-90
6
, can be used to determine whether the devices are in the Embedded Erase
6
Retired Product DS05-20863-5E_July 26, 2007
toggles only when the standard program or Erase, or Erase Suspend
/MBM29LV002BC
DQ
DQ
DQ
0
1
7
7
7
2
to toggle during the Embedded Erase Algorithm. If the
Toggle *
Toggle
Toggle
DQ
1
6
6
to toggle.
1
-70/-90
2
bit.
2
to toggle.
7
, is summarized
Toggle
Toggle
DQ
1 *
1
2
2
CC
CC
.
.

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