MBM29LV002TC-70 Meet Spansion Inc., MBM29LV002TC-70 Datasheet - Page 5

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MBM29LV002TC-70

Manufacturer Part Number
MBM29LV002TC-70
Description
Flash Memory Cmos 2m 256k ? 8 Bit
Manufacturer
Meet Spansion Inc.
Datasheet
MBM29LV002TC
/MBM29LV002BC
-70/-90
-70/-90
(Continued)
The MBM29LV002TC/BC are pin and command set compatible with JEDEC standard E
2
PROMs. Commands
are written to the command register using standard microprocessor write timings. Register contents serve as
input to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally
latch addresses and data needed for the programming and erase operations. Reading data out of the devices
is similar to reading from 5.0 V and 12.0 V Flash or EPROM devices.
The MBM29LV002TC/BC are programmed by executing the program command sequence. This will invoke the
Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths
and verifies proper cell margin. Typically, each sector can be programmed and verified in about 0.5 seconds.
Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase
Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed
before executing the erase operation. During erase, the devices automatically time the erase pulse widths and
verify proper cell margin.
Any individual sector is typically erased and verified in 1.0 second. (If already completely preprogrammed.)
The devices also feature a sector erase architecture. The sector mode allows each sector to be erased and
reprogrammed without affecting other sectors. The MBM29LV002TC/BC are erased when shipped from the
factory.
The devices feature single 3.0 V power supply operation for both read and write functions. Internally generated
and regulated voltages are provided for the program and erase operations. A low V
detector automatically
CC
inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ
,
7
by the Toggle Bit feature on DQ
, or the RY/BY output pin. Once the end of a program or erase cycle has been
6
completed, the devices internally reset to the read mode.
Fujitsu’s Flash technology combines years of EPROM and E
2
PROM experience to produce the highest levels
of quality, reliability, and cost effectiveness. The MBM29LV002TC/BC memories electrically erase the entire chip
or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes are programmed one byte
at a time using the EPROM programming mechanism of hot electron injection.
5
Retired Product DS05-20863-5E_July 26, 2007

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