MBM29LV160TM-BM90 Meet Spansion Inc., MBM29LV160TM-BM90 Datasheet - Page 24

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MBM29LV160TM-BM90

Manufacturer Part Number
MBM29LV160TM-BM90
Description
Flash Memory Cmos 16 M 2m ? 8/1m ? 16 Bit Mirrorflashtm*
Manufacturer
Meet Spansion Inc.
Datasheet
24
MBM29LV160TM/BM
Fast Programming
Extended Sector Protection
Query Command (CFI : Common Flash Memory Interface)
Write Operation Status
During Fast Mode, the programming can be executed with two bus cycles operation. The Embedded Program
Algorithm is executed by writing program set-up command (A0h) and data write cycles (PA/PD). See “Embedded
Program
In addition to normal sector protection, the device has Extended Sector Protection as extended function. This
function enables protection of the sector by forcing V
conventional procedures, it is not necessary to force V
requires V
this condition, the operation is initiated by writing the set-up command (60h) into the command register. Then
the sector addresses pins (A
the sector to be protected (set V
protection command (60h). A sector is typically protected in 250 μs. To verify programming of the protection
circuitry, the sector addresses pins (A
set and write a command (40h). Following the command write, a logical “1” at device output DQ
for protected sector in the read operation. If the output data is logical “0”, write the extended sector protection
command (60h) again. To terminate the operation, set RESET pin to V
Timing Diagram” in ■SWITCHING WAVEFORMS and “Extended Sector Protection Algorithm” in ■FLOW
CHART.)
The CFI (Common Flash Memory Interface) specification outlines device and host system software interrogation
handshake which allows specific vendor-specified software algorithms to be used for entire families of devices.
This allows device-independent, JEDEC ID-independent, and forward-and backward-compatible software sup-
port for the specified flash device families. Refer to CFI specification in detail.
The operation is initiated by writing the query command (98h) into the command register. Following the command
write, a read cycle from specific address retrieves device information. Please note that output data of upper byte
(DQ
terminate operation, it is necessary to write the Reset command sequence into the register. (See “Common
Flash Memory Interface Code” in ■DEVICE BUS OPERATION.)
Detailed in “Hardware Sequence Flags” are all the status flags which can determine the status of the device for
current mode operation. When checking Hardware Sequence Flags during program operations, it should be
checked 4 μs after issuing program command. During sector erase, the part provides the status flags automat-
ically to the I/O ports. The information on DQ
consecutively read, then the DQ
sector is consecutively read. This allows the user to determine which sectors are erasing.
Once erase suspend is entered address sensitivity still applies. If the address of a non-erasing sector (one
available for read) is provided, then stored data can be read from the device. If the address of an erasing sector
(one unavailable for read) is applied, the device will output its status bits.
15
to DQ
TM
ID
Algorithm for Fast Mode” in ■FLOW CHART.
for sector protection in this mode. The extended sector protection requires V
8
) is “0”. Refer to “Common Flash Memory Interface Code” in ■DEVICE BUS OPERATION. To
19
, A
2
18
IL
bit will toggle. However DQ
, A
for the other addresses pins is recommended), and write extended sector
Retired Product DS05-20906-4E_July 31, 2007
17
19
, A
, A
16
18
90
, A
, A
15
17
2
, A
, A
is address sensitive. If an address from an erasing sector is
14
16
, A
, A
ID
ID
on RESET pin and writes a command sequence. Unlike
13
15
and control timing for control pins. The only RESET pin
, A
and A
14
, A
2
12
will not toggle if an address from a non-erasing
13
) and (A
and A
IH
. (Refer to the “Extended Sector Protection
12
6
, A
) and (A
1
, A
0
) = (0, 0, 1, 0) should be set to
6
, A
1
, A
0
ID
) = (0, 1, 0) should be
on RESET pin. With
0
will produce

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