MBM29PL160TD Fujitsu Microelectronics, Inc., MBM29PL160TD Datasheet - Page 9

• Manufacturer Part Number: MBM29PL160TD
• Description: 16m 2m X 8/1m X 16 Bit
• Manufacturer: Fujitsu Microelectronics, Inc.

Random Read Mode
Page Read Mode
Standby Mode
Automatic Sleep Mode
Output Disable
FUNCTIONAL DESCRIPTION
The MBM29PL160TD/BD has two control functions which must be satisfied in order to obtain data at the outputs.
CE is the power control and should be used for a device selection. OE is the output control and should be used
to gate data to the output pins if a device is selected.
Address access time (t
access time (t
enable access time is the delay from the falling edge of OE to valid data at the output pins. (Assuming the
addresses have been stable for at least t
out a data without changing addresses after powe-up, it is necessary to input hardware reset or to change CE
pin from "H" to "L".
The MBM29PL160TD/BD is capable of fast Page read mode and is compatible with the Page mode MASK ROM
read operation. This mode provides faster read access speed for random locations within a page. The Page size
of the MBM29PL160TD/BD device is 8 words, or 16 bytes, within the appropriate Page being selected by the
higheraddress bits A
bytewithin that page. This is an asynchronous operation with the microprocessor supplying the specific word or
byte location.
The rondom or initial page access is equal to t
specified by the microprocessor fall within that Page) is equivalent to t
and OE is the output control and should be used to gate data to the output pins if the device is selected. Fast
Page mode accesses are obtained by keeping A
word, or changing A
The MBM29PL160TD/BD has a standby mode, a CMOS standby mode (CE input hel at V
current consumed is less than 50 A. During Embedded Algorithm operation, V
even CE = “H”. The device can be read with standard access time (t
In the standby mode, the outputs are in the high-impedance state, independent of the OE input. If the device
is deselected during erasure or programming, the device will draw active current until the operation is completed.
There is a function called automatic sleep mode to restrain power consumption during read-out of
MBM29PL160TD/BD data. This mode can be used effectively with an application requesting low power
consumption such as handy terminals.
To activate this mode, MBM29PL160TD/BD automatically switches itself to low power mode when addresses
remain stable for 150 ns. It is not necessary to control CE, WE, and OE in this mode. During such mode, the
current consumed is typically 50 A (CMOS Level).
Standard address access timings provide new data when addresses are changed. While in sleep mode, output
data is latched and always available to the system.
If the OE input is at a logic high level (V
be in a high-impedance state.
MBM29PL160TD
CE
) is the delay from stable addresses and stable CE to valid data at the output pins. The output
-1
0
to A
to A
ACC
) is equal to the delay from stable addresses to valid output data. The chip enable
2
2
to select the specific byte, within that page. See Figure 5.2 for timing specifications.
(in the word mode) and A
IH
), output from the device is disabled. This will cause the output pins to
ACC
- t
OE
ACC
3
time.) See Figure 5.1 for timing specifications. When reading
-75/-90
and subsequent Page read access (as long as the locations
to A
-1
19
to A
constant and changing A
2
(in the byte mode) determining the specific word/
/MBM29PL160BD
CE
PACC
) from standby modes.
. Here again, CE selects the device
CC
Active current (I
0
to A
2
to select the specific
CC
±0.3 V.), when the
CC2
) is required
-75/-90
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