MBM30LV0064 Fujitsu Microelectronics, Inc., MBM30LV0064 Datasheet - Page 10

• Manufacturer Part Number: MBM30LV0064
• Description: Flash Memory 64m 8m X 8 Bit Nand-type
• Manufacturer: Fujitsu Microelectronics, Inc.

10
MBM30LV0064
Read (3): 50h
Sequential Read
The Read (3) mode has identical timing to that of Read (1) and (2). However, while Read (1) and (2) are used
to access the array, Read (3) is used to access the 16 byte spare area. When the 50h command is executed,
the pointer will be set to an address space between columns 512 and 527. The values of Y will complete the
address decoding. During this operation, only address bits A
address; A
Each RE pulse used to output data from the data register will cause the column address pointer to increment
by one. When the final column has been reached, the next page will be automatically loaded into the data register.
The R/B signal may be used to monitor the completion of the data transfer.
I/O0 to I/O7
R/B
7
to A
CLE
ALE
I/O0
to I/O7
WE
CE
RE
R/B
4
0
0
are ignored. A
00h, SE=L
00h/01h/50h
255
Page (Row)
Command
Address
511 527
22
to A
Figure 3
50h
X
Address Input Data
0
9
Figure 4
are used to determine the starting row address.
01h, SE=L
0
255
Starting Address
Read Mode (3) Operation
Y
511 527
Sequential Read
X
255
X
0
511 527
3
to A
Y
00h, SE=H
255
(Column Address)
Data
0
are used to determine the starting column
511 527
Data Output
0
50h, SE=L
255
Data
511 527