MBM30LV0064 Fujitsu Microelectronics, Inc., MBM30LV0064 Datasheet - Page 34

• Manufacturer Part Number: MBM30LV0064
• Description: Flash Memory 64m 8m X 8 Bit Nand-type
• Manufacturer: Fujitsu Microelectronics, Inc.

34
MBM30LV0064
(10) Divided programming on same page
(11) Notification for RE Signal
The device uses the page programming method that allows programming up to ten times on the same page.
The procedure for divided programming (programming on a part of one page) is shown below.
When the device is in the read mode, the RE signal causes the internal column address counter to increment
in synchronization with the RE clock. If the 00h, 01h, or 50h command is input to the device in the read mode,
the internal column address counter will count up even after the RE signal is input prior to address input. At this
mode, at input of the RE signal beyond the last column address, the device will start reading (Memory
even without address input and may output the Busy signal (Sequential Read is started).
In this way, once the device enters the read mode, unintentional reading may be started after the RE signal is
input prior to addressing; therefore, the RE signal should be input after address input.
I/O0 to I/O7
The first programming
The second programming
The third programming
Result
WE
RE
R/B
00h/01h
Page N
Page N
Page N
Page N
/50h
Column A
Column A
Data Pattern 1
Data Pattern 1
Figure 32
“No Input” or “1”
Figure 33
Column B
Column B
Divided Program in the Same Page
“No Input” or “1”
‘1’
Column C
Column C
RE Input Before Address
Data Pattern 2
Data Pattern 2
“No Input” or “1”
Column D
Column D
‘1’
Address input
Column E
Column E
“No Input” or “1”
Data Pattern 3
Data Pattern 3
Column F
Column F
“No Input”
or “1”
‘1’
register)