S3041 AMCC (Applied Micro Circuits Corp), S3041 Datasheet - Page 14

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S3041

Manufacturer Part Number
S3041
Description
Sonet/sdh/atm OC-48 8:1 Transmitter
Manufacturer
AMCC (Applied Micro Circuits Corp)
Datasheet

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RECEIVER FRAMING
Figure 10 shows a typical reframe sequence in
which a byte realignment is made. The frame and
byte boundary detection is enabled by the rising
edge of OOF. The byte alignment is made during the
A1 data sequence, resulting in correct byte align-
ment on the outgoing data bus (POUT[7:0]). Frame
boundary is recognized upon receipt of the first A2
byte, and is reported via the frame pulse being set
high for one POCLK cycle concurrent with the third
A2 byte.
14
Figure 10. Frame and Byte Detection
S3042
Invalid Data
A1
A1
A1
The frame and byte boundary detection block is acti-
vated by the rising edge of OOF, and stays active until
the first FP pulse.
Figure 11 shows the frame and byte boundary detection
activation by a rising edge of OOF, and deactivated by
the first FP pulse.
Figure 12 shows the frame and byte boundary detec-
tion activation by a rising edge of FRAMEN, and
deactivated by the FRAMEN input.
Figure 12 also shows the frame and byte boundary
detection activation by a rising edge on FRAMEN,
and deactivation by the first FP pulse.
Valid Data
SONET/SDH/ATM OC-48 1:8 RECEIVER
A1
A2
A2
A2 (28H)
June 24, 1999 / Revision E

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