S3044 AMCC (Applied Micro Circuits Corp), S3044 Datasheet - Page 3

• Manufacturer Part Number: S3044
• Description: Bicmos Lvpecl Clock Generator Sonet/sdh/atm Oc-12 Transmitter Sonet/sdh/atm Oc-48 1:16 Receiver
• Manufacturer: AMCC (Applied Micro Circuits Corp)

DETAILED DESCRIPTION
Reference Generator
The reference generator provides temperature com-
pensated reference voltage, VREF, which is used to
program the laser diode bias current, I
modulation current, I
ence current, I
a resistor between VREF and the respective current
source pin.
Laser Bias Block with Automatic Power
Control
The laser bias current, I
resistor between the IBSET pin and VREF. The cur-
rent through the resistor is amplified by a gain factor,
A
There is a feedback configuration to adjust the laser
bias current to maintain constant laser power as la-
ser efficiency changes with temperature and age.
Light produced by the laser diode produces an aver-
age current in the monitor photo-diode. This current
flows into the IPD pin. The IPSET current source,
whose current is set by the IPSET resistor, draws
current away from the IPD node. When the two cur-
rents are equal, the voltage at that node is set by the
nominal reference voltage, V
plifier. When the currents are not equal a voltage
change is generated across the capacitor, C
which the differential amplifier translates to a voltage
which generates a current through the IBCMP resis-
tor. This current is summed with current through the
IBSET resistor which adjusts I
photo-diode current equals the nominal monitor
photo-diode current, I
Modulation Driver
The modulation driver consists of a high speed input
buffer and a differential output stage. The modula-
tion current, I
resistor between the IMSET pin and VREF.
The current through the resistor is amplified by a
gain factor, A
If the CLKSEL input is set Low, the data input, TD+/
TD–, is clocked at the input by TDCLK to provide low
jitter. If CLKSEL is High, TD+/TD– will be passed
through to the modulation driver with no re-clocking.
July 27, 1999 / Revision C
2.5 GBPS LASER DRIVER
IBSET
, to generate I
IMSET
MOD
PD
. The currents are set by connecting
, is programmed by connecting a
, to generate I
BIAS
MOD
PD
.
.
BIAS
, and the photo-diode refer-
NOM,
, is set by connecting a
BIAS
MOD
of a differential am-
until the monitor
.
BIAS
, the
APC,
Monitor Pins
I
IBIASMON and IMODMON pins respectively. The
monitor currents are a specified fraction of the actual
currents and are converted to a voltage by connect-
ing the pins to VCC through a resistor.
FAULT Detection
If the monitor photo-diode current increases beyond
the point which can be controlled by the APC loop,
the LSFAULT signal is asserted, indicating exces-
sive laser power (a FAULT condition). This condition
occurs when the voltage at the IPD node exceeds
V
LSFAULT is also asserted if V
ceed 3.8V, as this will generate excessively high
laser current.
FAIL Detection
If the monitor photo-diode current decreases beyond
the point which can be controlled by the APC loop,
LSFAIL is asserted, indicating low laser power (FAIL
condition). This condition occurs when the voltage at
the IPD pin drops below V
Laser Shutdown
If a FAULT or FAIL condition is detected the laser
bias and modulation currents will be turned off.
The laser can be enabled only by toggling the DIS-
ABLE input or by initiating a power-on cycle.
LSFAULT and LSFAIL will be reset on DISABLE de-
assert or V
If the CDEL pin is grounded, the shutdown of the
laser currents on a FAULT or FAIL detection is dis-
abled, and LSFAIL or LSFAULT will de-assert when
the FAULT or FAIL condition no longer exists.
Start-up Sequence
The laser bias and modulation currents are turned
on within a time t
from when the DISABLE input is de-asserted. During
the period t
shutdown of the laser is disabled in order to allow
the APC loop time to settle. During this time if a
FAULT or FAIL condition is detected the laser will
not be shut down as it could be caused by the APC
loop transient state. C
that t
time. LSFAULT and LSFAIL will not assert during
t
BIAS
DELAY
NOM
DELAY
and I
by more than 400mv.
.
MOD
CC
is much longer than the APC loop settling
DELAY
> 4.4V.
are mirrored and brought out on the
ON
, set by the capacitor C
from when V
DEL
NOM
should be chosen such
by more than 400mv.
REF
CC
is detected to ex-
exceeds 4.4V or
S3049
DEL
, the
3