S3052 AMCC (Applied Micro Circuits Corp), S3052 Datasheet

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S3052

Manufacturer Part Number
S3052
Description
Multi-rate Performance Monitor
Manufacturer
AMCC (Applied Micro Circuits Corp)
Datasheet

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February 12, 1999 / Revision C
DEVICE
SPECIFICATION
FEATURES
Figure 1. S3053 Block Diagram
2.5 GBIT QUAD MUX WITH FAN OUT BUFFERS
2.5 GBIT QUAD MUX WITH FAN OUT BUFFERS
OUTC0P
OUTC0N
OUTC1P
OUTC1N
• Supports 2.5 Gbit/sec data rates
• Fully differential for minimum
• TTL select
• High speed 50
• 0.84 W typical power dissipation
• 3.3 V power supply
• 52 Pin TQFP/TEP
INA0P
INA0N
INA1P
INA1N
jitter accumulation
source terminated outputs
SELA
MUX
0
1
A
SELC
MUX
C
0
1
GENERAL DESCRIPTION
The S3053 is a high performance quad mux with fan
out buffers. It is designed to minimize jitter accumu-
lation by providing a high bandwidth fully differential
signal path. It can be used to switch OC-48 data
signals in Dense Wavelength Division Multiplexer
designs and other high speed serial switch designs.
The chip is designed using four 2:1 multiplexers. It
can be used to fan out and/or multiplex high speed
clock and data signals. The S3053 is compatible
with the AMCC OC-48 clock recovery, MUX/DEMUX
and Crosspoint Switch products. This allows signal
integrity to be maintained throughout the system de-
sign.
The primary AC parameter of importance is the de-
terministic jitter or data eye degradation inserted by
the crosspoint. The design minimizes jitter accumu-
lation by using high bandwidth, low skew fully differ-
ential circuits. This provides for symmetric rise and
fall delays as well as noise rejection.
SELB
MUX
0
1
B
SELD
MUX
D
0
1
OUTB0P
OUTB0N
OUTB1P
OUTB1N
S3053
S3053
IND0P
IND0N
IND1P
IND1N
®
1

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S3052 Summary of contents

Page 1

DEVICE SPECIFICATION 2.5 GBIT QUAD MUX WITH FAN OUT BUFFERS 2.5 GBIT QUAD MUX WITH FAN OUT BUFFERS FEATURES • Supports 2.5 Gbit/sec data rates • Fully differential for minimum jitter accumulation • TTL select • High speed 50 source ...

Page 2

S3053 Table 1. Truth Table 2.5 GBIT QUAD MUX WITH FAN OUT BUFFERS ...

Page 3

GBIT QUAD MUX WITH FAN OUT BUFFERS Programable Swing Control An external resistor can be connected across adjacent pins, VSWx to VEEx, where x is B0, B1, C0 and C1. This will result in a decreased Vswing for the ...

Page 4

S3053 Table 2. Pin Assignment and Descriptions ...

Page 5

GBIT QUAD MUX WITH FAN OUT BUFFERS Figure 4. S3053 Pinout Package VEE VSWC0 VEEC0 OUTC0P OUTC0N VCC VEE VCC OUTC1N OUTC1P VEEC1 VSWC1 VEE February 12, 1999 / Revision S3053 5 52 Pin ...

Page 6

S3053 Figure 5. S3053 52 Pin TQFP/TEP Package Table 3. Thermal Management 2.5 GBIT QUAD MUX WITH FAN OUT BUFFERS ...

Page 7

GBIT QUAD MUX WITH FAN OUT BUFFERS Table 4. AC Characteristics (Over recommended operating conditions ...

Page 8

S3053 Table 8. Absolute Maximum Ratings ...

Page 9

GBIT QUAD MUX WITH FAN OUT BUFFERS Input Structures Two input structures exist in this part; TTL and High Speed, Differential Inputs. The LVTTL Inputs will interface with any LVTTL outputs. The High Speed, Differential Inputs can be AC ...

Page 10

S3053 Ordering Information Prefix Applied Micro Circuits Corporation • 6290 Sequence Dr., San Diego, CA ...

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