S3063 AMCC (Applied Micro Circuits Corp), S3063 Datasheet
S3063
Related parts for S3063
S3063 Summary of contents
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... The low jitter LVPECL interface guarantees compli- ance with the bit-error rate requirements of the Bellcore and ITU-T standards. The S3064 is pack- aged in a 100 TQFP/TEP, offering designers a small package outline. OTX ORX S3056 ORX 16 S3064 S3056 Rx 16 S3063 OTX Tx ® S3064 S3064 S3064 1 ...
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S3064 SONET OVERVIEW Synchronous Optical Network (SONET standard for connecting one fiber system to another at the opti- cal level. SONET, together with the Synchronous Digital Hierarchy (SDH) administered by the ITU-T, forms a single international standard for ...
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SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER S3064 OVERVIEW The S3064 receiver implements SONET/SDH deserialization and frame detection functions. The block diagram in Figure 4 shows the basic opera- tion of the chip. This chip can be used to implement the front ...
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S3064 RECEIVER OPERATION The S3064 receiver chip provides the first stage of digital processing of a receive SONET STS-48 bit- serial stream. It converts the bit-serial 2.488 Gbps data stream into a 155.52 Mbyte/sec parallel data format. A loopback mode ...
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SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER Table 2. Input Pin Assignment and Description ...
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S3064 Table 3. Output Pin Assignment and Description ...
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SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER Table 3. Output Pin Assignment and Description (Continued ...
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S3064 Table 4. Common Pin Assignment and Description ...
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SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER Figure 5. S3064 Pinout LVP_VCC 1 LVP_GND 2 3 LVP_GND 4 RSDP RSDN 5 LVP_VCC 6 LVP_GND 7 8 RSCLKP RSCLKN 9 10 CORE_VCC 11 CORE_GND CORE_VCC 12 13 CORE_GND 14 CORE_VCC 15 CORE_GND 16 ...
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S3064 Figure 6. 100 TQFP/TEP Package TOP VIEW Thermal Management Device S3064 1. Add 45 mA for loopback active. 2. Open outputs. Note: The S3064 package is equipped with an embedded conductive heatsink on the top (board side). 10 SONET/SDH/ATM ...
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SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER Table 5. Absolute Maximum Ratings ...
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S3064 Table 8. Low Swing Differential CML Output DC Characteristics ...
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SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER Table 12. Single Ended LVPECL Input DC Characteristics ...
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S3064 Table 16. AC Receiver Timing Characteristics ...
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SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER Figure 7. Output Timing Diagram POCLKP POUTP/N[15:0], FP Figure 8. Receiver Input Timing Diagram RSCLKP RSDP/N Notes on High-Speed LVPECL Input Timing: 1. Timing is measured from the cross-over point of the reference signal to ...
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S3064 RECEIVER FRAMING Figure 10 shows a typical reframe sequence in which a byte realignment is made. The frame and byte bound- ary detection is enabled by the rising edge of OOF. Both boundaries are recognized upon receipt of the ...
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SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER Figure 11. OOF Timing (FRAMEN = 1) OOF FP SEARCH Figure 12. FRAMEN Timing OOF FRAMEN FP SEARCH Figure 13. Differential Voltage Measurement V(+) V(–) V(+) – V(-) 0.0V Note: V(+) – V(-) is the ...
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... Figure 14. +5V Differential PECL Driver to S3064 Internally Biased Differential LVPECL Input AC Coupled Termination +5V 330 Figure 15. S3056 to S3064 Internally Biased Differential LVPECL Input DC Terminations +3.3V S3056 SERDATOP/N SERCLKOP/N Figure 16. S3064 Differential CML Output to S3063 Terminations +3.3V S3064 LLCLKP/N LLDP/N 18 SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER Vcc -0.70V (DC AVG) ...
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SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER Figure 17. S3064 Differential PECL Output +3.3V S3064 POUTP/N [15:0] Figure 18. Differential PECL Output Termination +3.3V S3064 POUTP/N [15:0] Figure 19. Differential PECL Output Termination to S3064 Internally Biased Differential LVPECL Input DC Terminations ...
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... S3064 Figure 20. S3063 to S3064 for Diagnostic Loopback Figure 21. Single-Ended LVPECL Driver to S3064 Input AC Coupled Termination Single-Ended Driver 20 SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER +3.3V Zo=50 Zo=50 S3063 LSDP/N LSCLKP/N Vcc 0.01 F Zo=50 300 0.01 F +3.3V 100 S3064 LSDP/N LSCLKP/N Vcc -0.70V (DC AVG) +3.3V 60 Vcc -0.70V (DC AVG) S3064 RSDP/N RSCLKP/N December 6, 1999 / Revision NC ...
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S3064 SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER Ordering Information – 6290 Sequence Drive, San Diego, CA 92121 ...