IDT82P2288 Integrated Device Technology, Inc., IDT82P2288 Datasheet - Page 178

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IDT82P2288

Manufacturer Part Number
IDT82P2288
Description
8 Channel T1/J1/E1 Transceiver
Manufacturer
Integrated Device Technology, Inc.
Datasheet

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IDT82P2288
T1/J1 Error Insertion (06FH, 16FH, 26FH, 36FH, 46FH, 56FH, 66FH, 76FH)
DDSINV:
CRCINV:
FsINV:
FtINV:
Programming Information
Bit Name
Default
Bit No.
Type
This bit is valid in T1 DM format when the FDIS bit (b0, T1/J1-062H,...) is ‘0’.
A transition from ‘0’ to ‘1’ on this bit wil invert one 6-bit DDS pattern.
This bit is cleared when the inversion is completed.
This bit is valid in ESF format when the FDIS bit (b0, T1/J1-062H,...) is ‘0’.
A transition from ‘0’ to ‘1’ on this bit will invert one 6-bit CRC pattern.
This bit is cleared when the invertion is completed.
In SF, T1 DM formats, this bit is valid when the FDIS bit (b0, T1/J1-062H,...) is ‘0’.
A transition from ‘0’ to ‘1’ on this bit will invert one Fs bit (the F-bit in even frame).
In ESF format, this bit is valid when the FDIS bit (b0, T1/J1-062H,...) is ‘0’.
A transition from ‘0’ to ‘1’ on this bit will invert one Frame Alignment bit.
In SLC-96 format, this bit is valid when the FDIS bit (b0, T1/J1-062H,...) is ‘0’.
A transition from ‘0’ to ‘1’ on this bit will invert one Synchronization Fs bit.
This bit is cleared when the inversion is completed.
In SF, T1 DM, SLC-96 formats, this bit is valid when the FDIS bit (b0, T1/J1-062H,...) is ‘0’.
A transition from ‘0’ to ‘1’ on this bit will invert one Ft bit (the F-bit in odd frame).
This bit is cleared when the inversion is completed.
7
6
Reserved
5
4
167
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
DDSINV
R/W
3
0
CRCINV
R/W
2
0
FsINV
R/W
1
0
March 22, 2004
FtINV
R/W
0
0

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