IDT82P2288 Integrated Device Technology, Inc., IDT82P2288 Datasheet - Page 273

• Manufacturer Part Number: IDT82P2288
• Description: 8 Channel T1/J1/E1 Transceiver
• Manufacturer: Integrated Device Technology, Inc.

IDT82P2288
E1 RBIF Option Register (046H, 146H, 246H, 346H, 446H, 546H, 646H, 746H)
DE:
MRSDA(MRSDB) and MRSIGA(MRSIGB).
FE:
CMS:
bit of the eight links should be set to the same value.
TRI:
Programming Information
Bit Name
Default
Bit No.
Type
This bit selects the active edge of RSCKn to update the data on RSDn and RSIGn and the active edge of MRSCK to update the data on
= 0: The falling edge is selected.
= 1: The rising edge is selected.
In Receive Multiplexed mode, the bit of the eight links should be set to the same value.
This bit selects the active edge of RSCKn to update/sample the pulse on RSFSn and the active edge of MRSCK to sample the pulse on MRSFS.
= 0: The falling edge is selected.
= 1: The rising edge is selected.
In Receive Multiplexed mode, the bit of the eight links should be set to the same value.
This bit is valid in Receive Clock Slave mode and Receive Multiplexed mode.
= 0: The speed of RSCKn/MRSCK is the same as the data rate on the system side (2.048 Mb/s / 8.192 Mb/s).
= 1: The speed of RSCKn/MRSCK is double the data rate on the system side (4.096 Mb/s / 16.384 Mb/s).
In Receive Clock Slave mode, if all eight links use the RSCK[1] and RSFS[1] to output the data (i.e., the RSLVCK bit (b, E1-01H) is set to ‘1’), the
In Receive Multiplexed mode, the bit of the eight links should be set to the same value.
= 0: The processed data and signaling bits are output on the RSDn/MRSDA(MRSDB) and RSIGn/MRSIGA(MRSIGB) pins respectively.
= 1: The output on the RSDn/MRSDA(MRSDB) and RSIGn/MRSIGA(MRSIGB) pins are in high impedance.
7
6
Reserved
5
4
262
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
R/W
DE
3
1
R/W
FE
2
1
CMS
R/W
1
0
March 22, 2004
R/W
TRI
0
1