IDT82P2288 Integrated Device Technology, Inc., IDT82P2288 Datasheet - Page 270

• Manufacturer Part Number: IDT82P2288
• Description: 8 Channel T1/J1/E1 Transceiver
• Manufacturer: Integrated Device Technology, Inc.

IDT82P2288
E1 TBIF Option Register (042H, 142H, 242H, 342H, 442H, 542H, 642H, 742H)
DE:
(MTSDB) and MTSIGA (MTSIGB).
FE:
CMS:
of the eight links should be set to the same value.
FSINV:
FSTYP:
ing the first bit of each Basic frame of the first link.
the Signaling Multi-frame is to be generated, TSFSn pulses during the first bit of each Signaling Multi-frame; if both the CRC Multi-frame and the Sig-
naling Multi-frame are to be generated, TSFSn goes high/low during the first bit of each Signaling Multi-frame and goes the opposite during the sec-
ond bit of each CRC Multi-frame. In Transmit Multiplexed mode, if the CRC Multi-frame is to be generated, MTSFS pulses during the first bit of each
CRC Multi-frame of the first link; if the Signaling Multi-frame is to be generated, MTSFS pulses during the first bit of each Signaling Multi-frame of the
first link; if both the CRC Multi-frame and the Signaling Multi-frame are to be generated, MTSFS goes high/low during the first bit of each Signaling
Multi-frame and goes the opposite during the second bit of each CRC Multi-frame of the first link.
Programming Information
Bit Name
Default
Bit No.
Type
This bit selects the active edge of TSCKn to sample the data on TSDn and TSIGn and the active edge of MTSCK to sample the data on MTSDA
= 0: The falling edge is selected.
= 1: The rising edge is selected.
In Transmit Multiplexed mode, the bit of the eight links should be set to the same value.
This bit selects the active edge of TSCKn to update/sample the pulse on TSFSn and the active edge of MTSCK to sample the pulse on MTSFS.
= 0: The falling edge is selected.
= 1: The rising edge is selected.
In Transmit Multiplexed mode, the bit of the eight links should be set to the same value.
This bit is valid in Transmit Clock Slave mode and Transmit Multiplexed mode.
= 0: The speed of TSCKn/MTSCK is the same as the data rate on the system side (2.048 Mb/s / 8.192 Mb/s).
= 1: The speed of TSCKn/MTSCK is double the data rate on the system side (4.096 Mb/s / 16.384 Mb/s).
In Transmit Clock Slave mode, if all eight links use TSCK[1] and TSFS[1] to input the data (i.e., the TSLVCK bit (b, T1/J1-01H) is set to ‘1’), the bit
In Transmit Multiplexed mode, the bit of the eight links should be set to the same value.
= 0: The transmit framing pulse TSFSn is active high.
= 1: The transmit framing pulse TSFSn is active low.
In Transmit Multiplexed mode, this bit of the eight links should be set to the same value.
= 0: In Transmit Non-multiplexed mode, TSFSn pulses during the first bit of each Basic frame. In Transmit Multiplexed mode, MTSFS pulses dur-
= 1: In Transmit Non-multiplexed mode, if the CRC Multi-frame is to be generated, TSFSn pulses during the first bit of each CRC Multi-frame; if
In Transmit Multiplexed mode, this bit of the eight links should be set to the same value.
7
Reserved
6
5
R/W
DE
4
0
259
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
R/W
FE
3
0
CMS
R/W
2
0
FSINV
R/W
1
0
March 22, 2004
FSTYP
R/W
0
0