S2060 AMCC (Applied Micro Circuits Corp), S2060 Datasheet - Page 2

• Manufacturer Part Number: S2060
• Description: Gigabit Ethernet Transceiver
• Manufacturer: AMCC (Applied Micro Circuits Corp)

S2060 OVERVIEW
The S2060 transmitter and receiver provide serial-
ization and deserialization functions for block en-
coded data to implement a Gigabit Ethernet
interface. The S2060 functional block diagram is de-
picted in Figure 2. The sequence of operations is as
follows:
Transmitter
1.10-bit parallel input
2. Parallel-to-serial conversion
3. Serial output
Receiver
1. Clock and data recovery from serial input
2. Serial-to-parallel conversion
3. Frame detection
4. 10-bit parallel output
The 10-bit parallel data input to the S2060 should be
from a DC-balanced encoding scheme, such as the
8B/10B transmission code, in which information to be
transmitted is encoded 8 bits at a time into 10-bit trans-
Figure 2. Functional Block Diagram
2
S2060
-LCK_REF
EN_CDET
TX[0:9]
EWRAP
RATEN
RXP
RXN
TBC
Control
Logic
10
2:1
F0 = F1 x 10
Multiplier w/
lock detect
PLL Clock
(4 x 10)
FIFO
Recovery w/
lock detect
PLL Clock
10
mission characters
mapping of the parallel data to the 8B/10B codes.
Loop Back
Local loopback provides a capability for performing
off-line testing. This is useful for ensuring the integ-
rity of the serial channel before enabling the trans-
mission medium. It also allows for system
diagnostics.
1. A.X. Widmer and P.A. Franaszek, "A Byte Oriented DC Bal-
anced (0,4) 8B/10B Transmission Code," IBM Research Report
RC 9391, May 1982.
Table 1. Data Mapping to 8B/10B
Alphabetic Representation
T
A
p l
[ X
a h
: 0
D
e b
] 9
8
c i t
Register
GIGABIT ETHERNET TRANSCEIVER
B
Register
R
r o
1 /
Shift
p e
Shift
0
e r
R
COMMA
B
e s
Detect
[ X
Logic
t n
: 0
i t a
n o
] 9
0
a
1
. For reference, Table 1 shows the
D
1
b
Q
2
c
S2060
3
d
June 22, 2000 / Revision G
10
D
a
4
e
a t
B
5
y
i
e t
TXP
TXN
RX[0:9]
COM_DET
RBC0
RBC1
6
f
7
g
8
h
9
j