OPB16450UART Xilinx Corp., OPB16450UART Datasheet - Page 11

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OPB16450UART

Manufacturer Part Number
OPB16450UART
Description
Ds433 August 18, 2004 Product Specification
Manufacturer
Xilinx Corp.
Datasheet
Scratch Register
As shown in
Divisor (Least Significant Byte) Register
As shown in
counter.
DS433 August 18, 2004
Product Specification
Table 12: Modem Status Register Bit Definitions
Table 13: Scratch Register Bit Definitions
Table 14: Divisor (Least Significant Byte) Register Bit Definitions
Notes:
1.
Location
Location
Location
X represents bit driven by external input.
7-0
7-0
Bit
Bit
Bit
7
6
5
4
3
2
1
0
Table
Table
Scratch
DDCD
DDSR
Name
DCTS
Name
14, the Divisor (Least Significant Byte) Register holds the least significant byte of the baud rate generator
Name
13, the Scratch Register can be used to hold user data.
TERI
DCD
DSR
CTS
DLL
RI
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Access
Access
Access
Reset Value
Reset Value
Reset Value
“00000000”
“00000000”
(1)
www.xilinx.com
1-800-255-7778
“X”
"X"
"X"
"X"
"0"
"0"
"0"
"0"
Data Carrier Detect.
Complement of DCDN input.
Ring Indicator.
Complement of RIN input.
Data Set Ready.
Complement of DSRN input.
Clear To Send.
Complement of CTSN input.
Delta Data Carrier Detect.
Change in DCDN since last MSR read.
Trailing Edge Ring Indicator.
RIN has changed from a low to a high.
Delta Data Set Ready.
Change in DSRN since last MSR read.
Delta Clear To Send.
Change in CTSN since last MSR read.
Scratch.
Divisor Least Significant Byte.
Description
Description
Description
OPB 16450 UART
11

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