OPB16450UART Xilinx Corp., OPB16450UART Datasheet - Page 6

no-image

OPB16450UART

Manufacturer Part Number
OPB16450UART
Description
Ds433 August 18, 2004 Product Specification
Manufacturer
Xilinx Corp.
Datasheet
OPB 16450 UART
Table 3: Parameter-Port Dependencies (Continued)
UART
UART
The OPB memory map location of the OPB 16450 UART is determined by setting the parameter C_BASEADDR, in the IPIF
interface module. The internal registers of the OPB 16450 UART are offset from the C_BASEADDR base address. Addition-
ally, some of the internal registers are accessible only when bit 7of the Line Control Register (LCR) is set. The UART internal
register set is described in
.
6
I/O
Signals
System
Interface (IPIF)
Register Definition
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
IP2INTC_Irpt
baudoutN
rclkK
sin
sout
xin
xout
ctsN
dcdN
dsrN
dtrN
riN
rtsN
ddis
out1N
out2Nn
rxrdyN
txrdyN
OPB_Clk
OPB_Rst
Freeze
Table
(1)
4.
Name
www.xilinx.com
1-800-255-7778
Affects Depends
G8, P13
G7, P30
UART Interrupt Signal
This input is unconnected and
UART receiver clock is connected
to BAUDOUTn if
C_HAS_EXTERNAL_RCLK=0.
This input is unconnected and
UART reference clock is
connected to OPB_Clk if
C_HAS_EXTERNAL_XIN=0.
Relationship Description
DS433 August 18, 2004
Product Specification

Related parts for OPB16450UART