AD9510 Analog Devices, AD9510 Datasheet - Page 28

• Manufacturer Part Number: AD9510
• Manufacturer: Analog Devices

AD9510
Addr
(Hex)
3B
3C
3D
3E
3F
40
41
42
43
44
45
46,47
48
49
4A
4B
4C
4D
4E
4F
50
51
52
53
54
55
56
Parameter
Name
Delay FS
Adjust 6
OUTPUTS
LVPECL OUT0
LVPECL OUT1
LVPECL OUT2
LVPECL OUT3
LVDS_CMOS
OUT 4
LVDS_CMOS
OUT 5
LVDS_CMOS
OUT 6
LVDS_CMOS
OUT 7
CLK1 AND
CLK2
Clocks select,
Power-Down
(PD) Options
DIVIDERS
Divider 0
Divider 0
Divider 1
Divider 1
Divider 2
Divider 2
Divider 3
Divider 3
Divider 4
Divider 4
Divider 5
Divider 5
Divider 6
Divider 6
Divider 7
Bit 7
(MSB)
Bypass
Bypass
Bypass
Bypass
Bypass
Bypass
Bypass
Blank
Test
Bit 6
Blank
Blank
Blank
Blank
Low Cycles <7:4>
Low Cycles <7:4>
Low Cycles <7:4>
Low Cycles <7:4>
Low Cycles <7:4>
Low Cycles <7:4>
Low Cycles <7:4>
Low Cycles <7:4>
Sync
Sync
Sync
Sync
Sync
Sync
Sync
No
No
No
No
No
No
No
Blank
Blank
Blank
Blank
Bit 5
CLKs in
Force
Force
Force
Force
Force
Force
Force
Blank
PD
Rev. PrA | Page 28 of 41
Bit 4
REFIN PD
Start H/L
Start H/L
Start H/L
Start H/L
Start H/L
Start H/L
Start H/L
Inverted
Inverted
Inverted
Inverted
CMOS
CMOS
CMOS
CMOS
Driver
Driver
Driver
Driver
Test
On
On
On
On
Blank
Bit 3
Output Level <3:2>
Output Level <3:2>
Output Level <3:2>
Output Level <3:2>
PLL PD
CLK to
Select
Select
Select
Select
Logic
Logic
Logic
Logic
Bit 2
Output Level <2:1>
Output Level <2:1>
Output Level <2:1>
Output Level <2:1>
CLK2 PD
Phase Offset <3:0>
Phase Offset <3:0>
Phase Offset <3:0>
Phase Offset <3:0>
Phase Offset <3:0>
Phase Offset <3:0>
Phase Offset <3:0>
High Cycles <3:0>
High Cycles <3:0>
High Cycles <3:0>
High Cycles <3:0>
High Cycles <3:0>
High Cycles <3:0>
High Cycles <3:0>
High Cycles <3:0>
I Adjust for Process <2:0>
Bit 1
Power-Down <1:0>
Power-Down <1:0>
Power-Down <1:0>
Power-Down <1:0>
Preliminary Technical Data
CLK1
Test
PD
Bit 0
(LSB)
Output
Output
Output
Output
Power
Power
Power
Power
CLK IN
Select
Def.
Value
(Hex)
04
0A
08
08
08
02
02
03
03
01
00
00
00
00
11
00
33
00
00
00
11
00
00
00
00
Notes
Midpoint
OFF
ON
ON
ON
LVDS, ON
LVDS, ON
LVDS, OFF
LVDS, OFF
Input
Receivers
All Clocks
ON, Select
CLK1
Divide by 2
Phase = 0
Divide by 2
Phase = 0
Divide by 4
Phase = 0
Divide by 8
Phase = 0
Divide by 2
Phase = 0
Divide by 4
Phase = 0
Divide by 2
Phase = 0
Divide by 2