XR17D158 Exar Corporation, XR17D158 Datasheet - Page 27

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XR17D158

Manufacturer Part Number
XR17D158
Description
Eight-channel Pci-bus Uart
Manufacturer
Exar Corporation
Datasheet

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XR17D158
UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
REV. P1.0.0
There are 8 UARTs [channel 7:0] in the D158. Each has its own 64-byte of transmit and receive FIFO, a set of
16550 compatible control and status registers, and a baud rate generator for individual channel data rate
setting. Eight additional registers per UART were added for the EXAR enhanced features.
Each UART has its own Baud Rate Generator (BRG) with a prescaler for the transmitter and receiver. The
prescaler is controlled by a software bit in the MCR register. The MCR register bit-7 sets the prescaler to divide
the input crystal or external clock by 1 or 4. The output of the prescaler clocks to the BRG. The BRG further
divides this clock by a programmable divisor between 1 and (2
serial data rate. The sampling clock is used by the transmitter for data bit shifting and receiver for data
sampling. The BRG divisor (DLL and DLM registers) defaults to a random value upon power up. Therefore, the
BRG must be programmed during initialization to the operating data rate.
Programming the Baud Rate Generator Registers DLM and DLL provides the capability for selecting the
operating data rate.
clock at 16X clock rate. At 8X sampling rate, these data rates would double. When using a non-standard data
rate crystal or external clock, the divisor value can be calculated with the following equation(s).
5.0 UART
5.1
O
divisor (decimal) = (XTAL1 clock frequency / prescaler) / (serial data rate x 16),
divisor (decimal) = (XTAL1 clock frequency / prescaler / (serial data rate x 8),
UTPUT
MCR Bit-7=1
T
ABLE
1200
2400
4800
100
600
Programmable Baud Rate Generator
Data Rate
9: T
F
IGURE
XT A L1
XT A L2
YPICAL DATA RATES WITH A
O
UTPUT
Table 9
10. B
MCR Bit-7=0
19.2k
2400
4800
9600
400
Data Rate
AUD
shows the standard data rates available with a 14.7456 MHz crystal or external
C rystal
Buffer
O sc/
R
ATE
C hannels
T o O ther
Clock (Decimal)
D
G
IVISOR FOR
ENERATOR
2304
14.7456 MH
384
192
96
48
D ivide by 4
D ivide by 1
Prescaler
Prescaler
16x
D
27
IVISOR FOR
Z CRYSTAL OR EXTERNAL CLOCK AT
Clock (HEX)
M C R Bit-7=0
M C R Bit-7=1
900
180
C0
60
30
(default)
16
-1) to obtain a 16X or 8X sampling clock of the
16x
Baud R ate
D LL and D LM
G enerator
R egisters
Logic
V
WITH
ALUE
P
WITH
ROGRAM
DLM
09
01
00
00
00
8XMODE [7:0]
(HEX)
8XMODE [7:0]
R ate C lock to
and R eceiver
T ransm itter
16X or 8X
Sam pling
V
ALUE
P
PRELIMINARY
ROGRAM
DLL
C0
00
80
60
30
IS
16X S
(HEX)
IS
1
áç
áç
áç
áç
0
AMPLING
D
E
ATA
RROR
0
0
0
0
0
R
ATE
(%)

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