XR17D158 Exar Corporation, XR17D158 Datasheet - Page 49

• Manufacturer Part Number: XR17D158
• Description: Eight-channel Pci-bus Uart
• Manufacturer: Exar Corporation

XR17D158
UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
REV. P1.0.0
ENHANCED FEATURE REGISTER (EFR)
Enhanced features are enabled or disabled using this register. Bit 0-3 provide single or dual consecutive
character software flow control selection (see
Xoff2 modes are selected, the double 8-bit words are concatenated into two sequential characters. Caution:
note that whenever changing the TX or RX flow control bits, always reset all bits back to logic 0 (disable) before
programming a new setting.
EFR BIT 0-3: Software Flow Control Select
Combinations of software flow control can be selected by programming these bits.
EFR[4]: Enhanced Function Bits Enable
Enhanced function control bit. This bit enables the functions in IER bits 4-7, ISR bits 4-5, FCR bits 4-5, and
MCR bits 5-7 to be modified. After modifying any enhanced bits, EFR bit-4 can be set to a logic 0 to latch the
new values. This feature prevents legacy software from altering or overwriting the enhanced functions once
set. Normally, it is recommended to leave it enabled, logic 1.
EFR[5]: Special Character Detect Enable
Logic 0 = modification disable/latch enhanced features. IER bits 4-7, ISR bits 4-5, FCR bits 4-5, and MCR
bits 5-7 are saved to retain the user settings. After a reset, the IER bits 4-7, ISR bits 4-5, FCR bits 4-5, and
MCR bits 5-7 are set to a logic 0 to be compatible with ST16C554 mode. (default).
Logic 1 = Enables the enhanced functions. When this bit is set to a logic 1 all enhanced features are enabled.
Logic 0 = Special Character Detect Disabled (default).
Logic 1 = Special Character Detect Enabled. The UART compares each incoming receive character with
data in Xoff-2 register. If a match exists, the received data will be transferred to FIFO and ISR bit-4 will be set
to indicate detection of the special character. Bit-0 corresponds with the LSB bit for the receive character. If
flow control is set for comparing Xon1, Xoff1 (EFR [1:0]=’10’) then flow control and special character work
normally. However, if flow control is set for comparing Xon2, Xoff2 (EFR[1:0]=’01’) then flow control works
normally, but Xoff2 will not go to the FIFO, and will generate an Xoff interrupt and a special character
interrupt.
T
ABLE
FCTR B
16: 16 S
1
1
1
1
1
1
IT
-3 FCTR B
ELECTABLE
1
1
0
0
0
0
IT
-2 FCTR B
H
YSTERESIS
Table 17
1
1
0
0
1
1
IT
-1 FCTR B
L
EVELS
49
and
0
1
0
1
0
1
Table
W
IT
HEN
-0
18). When the Xon1 and Xon2 and Xoff1 and
T
RIGGER
RTS/DTR H
(
CHARACTERS
T
ABLE
± 28
± 36
± 40
± 44
± 48
± 52
YSTERESIS
-D
IS
)
S
PRELIMINARY
ELECTED
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