ATA6602 ATMEL Corporation, ATA6602 Datasheet - Page 124

• Manufacturer Part Number: ATA6602
• Description: LIN and Microcontroller System-In-Package: LIN Transceiver, integrated 5V/50 mA voltage regulator, window watchdog and automotive AVR ATmega88 (8 kBytes Flash); green QFN48 package.
• Manufacturer: ATMEL Corporation

124
ATA6602/ATA6603
Table 4-49
rect PWM mode.
Table 4-49.
Note:
Table 4-50.
Notes:
• Bits 3, 2 – Res: Reserved Bits
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Mode
COM0B1
0
1
2
3
4
5
6
7
These bits are reserved bits in the ATA6602/ATA6603 and will always read as zero.
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the count-
ing sequence of the counter, the source for maximum (TOP) counter value, and what type of
waveform generation to be used (see
Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare Match (CTC)
mode, and two types of Pulse Width Modulation (PWM) modes (see
on page
0
0
1
1
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
1. MAX
2. BOTTOM = 0x00
WGM02
pare Match is ignored, but the set or clear is done at TOP. See
page 118
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase cor-
115).
0
0
0
0
1
1
1
1
Compare Output Mode, Phase Correct PWM Mode
Waveform Generation Mode Bit Description
COM0B0
for more details.
= 0xFF
0
1
0
1
WGM01
0
0
1
1
0
0
1
1
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting.
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting.
WGM00
0
1
0
1
0
1
0
1
Timer/Counter
Mode of
Operation
Normal
PWM, Phase
Correct
CTC
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
Table
4-50). Modes of operation supported by the
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
–
–
(1)
“Phase Correct PWM Mode” on
Update of
Immediate
Immediate
OCRx at
TOP
TOP
TOP
TOP
“Modes of Operation”
–
–
4921C–AUTO–01/07
Set on
TOV Flag
BOTTOM
BOTTOM
MAX
MAX
MAX
TOP
–
–
(1)(2)