ATA6602 ATMEL Corporation, ATA6602 Datasheet - Page 15
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ATA6602
Manufacturer Part Number
ATA6602
Description
LIN and Microcontroller System-In-Package: LIN Transceiver, integrated 5V/50 mA voltage regulator, window watchdog and automotive AVR ATmega88 (8 kBytes Flash); green QFN48 package.
Manufacturer
ATMEL Corporation
Datasheet
1.ATA6602.pdf
(362 pages)
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3.3.17
3.3.17.1
4921C–AUTO–01/07
Watchdog
Typical Timing Sequence with R
Figure 3-8.
The watchdog anticipates a trigger signal from the microcontroller at the NTRIG (negative edge)
or the PTRIG (positive edge) input within a period time window of T
exceed a minimum time t
generated at output NRES. The timing basis of the watchdog is provided by the internal oscilla-
tor, of which the time period T
In Silent or Sleep Mode, the watchdog is switched off to reduce current consumption.
Minimum time for first watchdog pulse is required after the undervoltage reset at NRES disap-
pears and is defined as lead time t
The trigger signal T
For example, with an external resistor of R
watchdog come out as follows:
t
t
t
t
t
After ramping up the battery voltage V
switched on. The reset output NRES stays low for the time t
switches to high and the watchdog waits for the watchdog sequence from the microcontroller.
This lead time t
RXD switches to low. The lead time t
the first watchdog pulse from the microcontroller is required. If the trigger pulse NTRIG (or
PTRIG, as the case may be) occurs during this time, the time t
signal occurs during the time t
OSC
d
1
2
nres
= 3922
= 800
= 840
= 157
= 12.5 µs due to 51 k
12.5 µs = 10 ms
12.5 µs = 10.5 ms
12.5 µs = 49 ms
12.5 µs = 1.96 ms
Power Dissipation: Safe Operating Area versus V
Voltage V
d
follows after the reset and is t
wd_osc
wd
is adjustable between 2.9 ms and 33 ms via the external resistor R
40
30
20
50
45
35
25
55
10
15
0
S
5
= 51 k
trigmin
5
at Different Temperatures T
6
osc
d
> 3 µs. If a triggering signal is not received, a reset signal will be
, a watchdog reset with t
7
is adjustable via the external resistor R
d
.
8
d
follows the negative edge of this RXD signal. In this time,
9
S
10
or wake up from Sleep Mode, the 5V regulator is
wd_oscSC
11
V
d
S
= 49 ms. After wake up from Silent Mode the
12
(V)
= 51 k ±1%, the typical parameters of the
13
case
NRES
14
ATA6602/ATA6603
15
= 1.96 ms will reset the microcon-
1
DD
16
starts immediately. If no trigger
reset
125˚C
105˚C
Output Current and Supply
17
wd
(typically 10 ms), then it
. The trigger signal must
18
wd_osc
19
(10 k to 120 k ).
wd_osc
15
.
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