WM8580AGEFT Wolfson Microelectronics Ltd., WM8580AGEFT Datasheet - Page 67

• Manufacturer Part Number: WM8580AGEFT
• Description: Multichannel Codec with S/pdif Transceiver
• Manufacturer: Wolfson Microelectronics Ltd.

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Table 66 GPO Control Registers
REGISTER
ADDRESS
GPO1
GPO2
GPO3
GPO4
GPO5
R38
R39
R40
R41
R42
2Ah
26h
27h
28h
29h
NON-AUDIO DETECTION
The SPDIF payload can contain PCM data for audio or non-audio applications. In the case where the
payload contains the 96 bit synchronization code defined in IEC61937 then this indicates that the
payload contains data which is not suitable for direct playback through an audio codec.This 96 bit
code is defined as 4*16bits of ‘0’+Pa (16bits)+Pb (16bits)..
If the SPDIFRx interface decodes this sync code then it sets the PCM_N bit.
When the PCM_N =1, then it indicates non-audio data. When the PCM_N =0, then it indicates that
the SPDIF payload does not contain the synch code..
Another status bit, AUDIO_N status is recovered from the Channel Status block.It is bit 1 of the
channel status. When AUDIO_N =0, then it indicates that the SPDIF payload contains audio PCM
encoded data. This is also referred to as linear PCM data.When the AUDIO_N= 1, then it indicates
that the SPDIF payload does not contain audio PCM data.
NON_AUDIO data is indicated by a logical OR of the AUDIO_N and PCM_N flags.
If DAC1 is sourcing the S/PDIF Receiver and either the AUDIO_N or PCM_N flags are asserted,
DAC1 is automatically muted using the soft mute feature. As described above, any change of
AUDIO_N or PCM_N status will cause an INT_N interrupt (UPD_NON_AUDIO) to be generated. If
the MASK register bit for AUDIO_N or PCM_N is set, then the associated signal will not generate an
interrupt (UPD_NON_AUDIO) but the DAC will be muted.
S/PDIF INPUT/ GPO PIN CONFIGURATION
The WM8580 has ten pins which can be configured as GPOs using the registers shown in Table 66.
The GPO pins can be used to output status data decoded by the S/PDIF receiver. These same pins
may be used as S/PDIF inputs as described in Table 55.
BIT
3:0
7:4
3:0
7:4
3:0
7:4
3:0
7:4
3:0
7:4
GPO1OP[3:0]
GPO2OP[3:0]
GPO3OP[3:0]
GPO4OP[3:0]
GPO5OP[3:0]
GPO6OP[3:0]
GPO7OP[3:0]
GPO8OP[3:0]
GPO9OP[3:0]
GPO10OP
LABEL
[3:0]
DEFAULT
0001
0010
0011
0101
0110
0111
1000
1001
0000
0100
0000 = INT_N
0001 = V
0010 = U
0011 = C
0100 = P
0101 = SFRM_CLK
0110 = 192BLK
0111 = UNLOCK
1000 = CSUD
1001 = Invalid
1010 = ZFLAG
1011 = NON_AUDIO
1100 = CPY_N
1101 = DEEMP
1110 = Set GPO as S/PDIF input (CMOS-compatible
input). Only applicable for GPO3/4/5.
1111 = Set GPO as S/PDIF input (‘comparator’ input for
AC coupled consumer S/PDIF signals). Only applicable
for GPO3/4/5
DESCRIPTION
PD Rev 4.3 August 2007
WM8580
67