AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 99
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AT94K05AL
Manufacturer Part Number
AT94K05AL
Description
Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
Manufacturer
ATMEL Corporation
Datasheet
1.AT94K05AL.pdf
(192 pages)
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TCNT1
Timer/Counter1 Write
Rev. 1138F–FPSLI–06/02
• Bits 2,1,0 - CS12, CS11, CS10: Clock Select1, Bits 2, 1 and 0
The Clock Select1 bits 2,1 and 0 define the prescaling source of Timer/Counter1.
Table 28. Clock 1 Prescale Select
The Stop condition provides a Timer Enable/Disable function. The CK down-divided modes
are scaled directly from the CK oscillator clock. If the external pin modes are used for
Timer/Counter1, transitions on PE4/(T1) will clock the counter even if the pin is configured as
an output. This feature can give the user SW control of the counting.
Timer/Counter1 Register – TCNT1H AND TCNT1L
This 16-bit register contains the prescaled value of the 16-bit Timer/Counter1. To ensure that
both the High and low bytes are read and written simultaneously when the CPU accesses
these registers, the access is performed using an 8-bit temporary register (TEMP). This tem-
porary register is also used when accessing OCR1A, OCR1B and ICR1. If the main program
and also interrupt routines perform access to registers using TEMP, interrupts must be dis-
abled during access from the main program and interrupt routines.
When the CPU writes to the high byte TCNT1H, the written data is placed in the TEMP regis-
ter. Next, when the CPU writes the low byte TCNT1L, this byte of data is combined with the
byte data in the TEMP register, and all 16 bits are written to the TCNT1 Timer/Counter1 regis-
ter simultaneously. Consequently, the high byte TCNT1H must be accessed first for a full
16-bit register write operation.
Bit
$2D ($4D)
$2C ($4C)
Read/Write
Initial Value
CS12
0
0
0
0
1
1
1
1
15
MSB
7
R/W
R/W
0
0
CS11
0
0
1
1
0
0
1
1
14
6
R/W
R/W
0
0
CS10
0
1
0
1
0
1
0
1
13
5
R/W
R/W
0
0
Description
Stop, the Timer/Counter1 is stopped
CK
CK/8
CK/64
CK/256
CK/1024
External pin PE4 (T1), falling edge
External pin PE4 (T1), rising edge
12
4
R/W
R/W
0
0
11
3
R/W
R/W
0
0
AT94K Series FPSLIC
10
2
R/W
R/W
0
0
9
1
R/W
R/W
0
0
8
LSB
0
R/W
R/W
0
0
TCNT1H
TCNT1L
99
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