AT94K ATMEL Corporation, AT94K Datasheet - Page 102

• Manufacturer Part Number: AT94K
• Description: 5K - 40K Gates of At40k FPGA with 8-bit Microcontroller, up to 36K Bytes of SRAM and On-chip JTAG ICE
• Manufacturer: ATMEL Corporation

102
AT94K Series FPSLIC
Table 29. Timer TOP Values and PWM Frequency
Table 30. Compare1 Mode Select in PWM Mode
Notes:
In the PWM mode, the 8, 9 or 10 least significant OCR1A/OCR1B bits (depends of resolution),
when written, are transferred to a temporary location. They are latched when Timer/Counter1
reaches the value TOP. This prevents the occurrence of odd-length PWM pulses (glitches) in
the event of an unsynchronized OCR1A/OCR1B write. See Figure 56 and Figure 57 for an
example in each mode.
CTC1
CTC1
x
0
0
1
1
0
0
0
1
1
1
(2)
(1)
1. X = A or B
2. x = Don’t care
PWM11
COM1X1
0
1
1
0
1
1
0
1
1
1
1
(1)
PWM10
1
0
1
1
0
1
COM1X0
x
0
1
0
1
(2)
PWM Resolution
(1)
10-bit
10-bit
8-bit
9-bit
8-bit
9-bit
Effect on OCX1
Not connected
Cleared on compare match, up-counting. Set on
compare match, down-counting (non-inverted PWM)
Cleared on compare match, down-counting. Set on
compare match, up-counting (inverted PWM)
Cleared on compare match, set on overflow
Set on compare match, set on overflow
Timer TOP Value
$03FF(1023)
$03FF(1023)
$00FF (255)
$01FF (511)
$00FF (255)
$01FF (511)
Rev. 1138F–FPSLI–06/02
Frequency
f
f
f
f
TCK1
TCK1
f
f
TCK1
TCK1
TCK1
TCK1
/1022
/2046
/1024
/510
/256
/512