AT94K ATMEL Corporation, AT94K Datasheet - Page 126

• Manufacturer Part Number: AT94K
• Description: 5K - 40K Gates of At40k FPGA with 8-bit Microcontroller, up to 36K Bytes of SRAM and On-chip JTAG ICE
• Manufacturer: ATMEL Corporation

Baud-rate Generator
126
AT94K Series FPSLIC
• Bit 3 - TXEN0/TXEN1: Transmitter Enable
This bit enables the UART transmitter when set (one). When disabling the transmitter while
transmitting a character, the transmitter is not disabled before the character in the shift register
plus any following character in UDRn has been completely transmitted.
• Bit 2 - CHR90/CHR91: 9-bit Characters
When this bit is set (one) transmitted and received characters are 9-bit long plus start and stop
bits. The 9-bit is read and written by using the RXB8n and TXB8n bits in UCSRnB, respec-
tively. The 9th data bit can be used as an extra stop bit or a parity bit.
• Bit 1 - RXB80/RXB81: Receive Data Bit 8
When CHR9n is set (one), RXB8n is the 9th data bit of the received character.
• Bit 0 - TXB80/TXB81: Transmit Data Bit 8
When CHR9n is set (one), TXB8n is the 9th data bit in the character to be transmitted.
The baud-rate generator is a frequency divider which generates baud-rates according to the
following equation
•
•
•
Note:
For standard crystal frequencies, the most commonly used baud-rates can be generated by
using the UBR settings in Table 35. UBR values which yield an actual baud-rate differing less
than 2% from the target baud-rate, are bold in the table. However, using baud-rates that have
more than 1% error is not recommended. High error ratings give less noise resistance.
BAUD = Baud-rate
f
UBR = Contents of the UBRRHI and UBRRn Registers, (0 - 4095)
CK
= Crystal Clock Frequency
1. This equation is not valid when the UART transmission speed is doubled. See “Double
Speed Transmission” on page 128 for a detailed description.
(1)
:
BAUD
=
--------------------------------- -
16(UBR
f
CK
+
1 )
Rev. 1138F–FPSLI–06/02