AT94K ATMEL Corporation, AT94K Datasheet - Page 49

• Manufacturer Part Number: AT94K
• Description: 5K - 40K Gates of At40k FPGA with 8-bit Microcontroller, up to 36K Bytes of SRAM and On-chip JTAG ICE
• Manufacturer: ATMEL Corporation

Rev. 1138F–FPSLI–06/02
Figure 32. Memory-mapped I/O
For single-cycle access (In/Out Commands) to I/O, the instruction has to be less than 16 bits:
In the data SRAM, the registers are located at memory addresses $00 - $1F and the I/O space
is located at memory addresses $20 - $5F.
As there are only 6 bits available to refer to the I/O space, the address is shifted down 2 bits.
This means the In/Out commands access $00 to $3F which goes directly to the I/O and maps
to $20 to $5F in SRAM. All other instructions access the I/O space through the $20 - $5F
addressing.
For compatibility with future devices, reserved bits should be written zero if accessed.
Reserved I/O memory addresses should never be written.
The status flags are cleared by writing a logic 1 to them. Note that the CBI and SBI instructions
will operate on all bits in the I/O register, writing a one back into any flag read as set, thus
clearing the flag. The CBI and SBI instructions work with registers $00 to $1F only.
$00
$3F
opcode
5 bits
Used for In/Out
Instructions
I/O Space
register
r0 - 31 ($1F)
5 bits
AT94K Series FPSLIC
Registers r0 - r31
Other Instructions
Memory-mapped
SRAM Space
Used for all
I/O
address
r0 - 63 ($3F)
6 bits
$5F
$1F
$00
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