CLIENT ST Microelectronics, Inc., CLIENT Datasheet - Page 25

• Manufacturer Part Number: CLIENT
• Description: STPC Client Datasheet / PC Compatible Embeded Microprocessor
• Manufacturer: ST Microelectronics, Inc.

2.3 UPDATE HISTORY FOR PIN DESCRIPTION CHAPTER
The following changes have been made to the Pin Description Chapter on 11/02/2000
The following changes have been made to the Pin Description Chapter on 08/02/2000
The following changes have been made to the Pin Description Chapter on 13/01/2000
DCLK Dot Clock / Pixel clock. This clock supplies the display controller, the video pipeline, the ramdac,
and the TV output logic. Its value is dependent on the selected display mode.
Its frequency can be as high as 135 MHz. This signal is either driven by the internal PLL to a minimum of
8MHz or by an external oscillator. The direction can be controlled by a strap option or an internal register
bit.
The following changes have been made to the Pin Description Chapter on 28/09/99
The following changes have been made to the Pin Description Chapter on 23/09/99
The following changes have been made to the Pin Description Chapter on 11/08/99
Section
Section
Section
Section
Table 2-1.
Figure 2-1.
Table 2-2.
2.2.5.
2.2.3.
2.2.
2.2.1.
2.2.1.
2.2.3.
Change
Added
Change
Replaced
Change
Added
Change
Changed
Changed
Replaced
Moved
Moved
Replaced
Text
“
es.”
Text
Signals VIDEO_D[7:0] with VIN, VTV_BT# with ODD_EVEN, VTV_SYNCH with VCS.
Text
“
Text
Updated signal pin counts and added abbreviations to table.
Updated External interface pin count
“PWGD” with “SYSRSTI#”
PCI_CLKI and PCI_CLKO moved from
ISA_CLK and ISA_CLKX2 moved from
“Video Interface” with “Video Input”
Signals AD[12:11] for internal use only. Not to be used for External PCI devic-
to a minimum of 8MHz”
Issue 2.2 - October 13, 2000
UPDATE HISTORY FOR PIN DESCRIPTION CHAPTER
2.2.1.
2.2.1.
to
to
2.2.5.
2.2.8.
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