CLIENT ST Microelectronics, Inc., CLIENT Datasheet - Page 40

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CLIENT

Manufacturer Part Number
CLIENT
Description
STPC Client Datasheet / PC Compatible Embeded Microprocessor
Manufacturer
ST Microelectronics, Inc.
Datasheet
ELECTRICAL SPECIFICATIONS
Table 4-5. AC Memory Timing Characteristics
40/61
Note 1; T
Where T
T
Note 2; Value to be derived from CAS pulse width which is programmable (see
Note 3; for all chronograms, CLK refers to the clock signal that the program is using. It can be either HCLK or GCLK2X
Note 4; These timings are extracted from simulations and are not garanteed by testing
Dataoff
tCMWE
tGCMD
tCRAS
tCCAS
tCRW
tWCH
tWCS
tWRH
tWRP
tWCR
tCOH
tRWL
tCWL
tCAH
tCHR
tCPN
tCRP
tCSR
tRAH
tRCD
tRCH
tRCS
tRAD
tDHR
tRPC
tCRS
tCHR
tCSH
tRAS
tRAL
tCMD
tMDG
tCMA
tDS
tRC
tRP
tAR
n
T
t
CAS Out
CAS
Dataoff
and t
4
4
4
4
4
4
Cycle
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
Cycle
is the number of CAS Cycles (see
CAS Out
is the the number of clock cycles.
Parameter
is the Generic Datahold
x n
HCLK (or GCLK2X) to RAS#[3:0] valid (see Note 3)
HCLK (or GCLK2X) to CAS#[7:0] bus valid (see Note 3)
HCLK (or GCLK2X) to MA[11:0] bus valid (see Note 3)
HCLK (or GCLK2X) to MWE# valid (see Note 3)
HCLK to MD[63:0] bus valid (see Note 3)
GCLK2X to MD[63:0] bus valid (see Note 3)
MD[63:0] Generic hold
Column Address Hold Time
CAS Hold Time
Data Hold TIme from CAS Low
CAS Precharge Time
CAS to RAS Precharge Time
CAS Low to RAS HIGH (Write only)
CAS Setup Time
Data In Setup Time
Row Address Hold Time
RAS Pulse Width
Random Read or Write Time Cycle
RAS to CAS Delay Time
Read Command Hold Time
Read Command Setup Time
RAS Precharge Time
Write Command Hold Time
WE Command Setup Time
WE Hold Time
WE Setup Time
Column Address Hold Time from RAS
RAS to valid Column Address Delay
Column Address to RAS Setup Time
Write Command Hold Reference to RAS
Write Command to RAS Setup Time (Note 2)
Write Command to CAS Setup Time (Note 2)
Data Hold Reference to RAS
RAS High to CAS Low Precharge
CAS Before RAS Setup Time
CAS Before RAS Hold Time
CAS Hold Time after RAS
the CLK (either HCLK or GCLK2X) to CAS Low.
CAS
are used to refine the timing programming.
+ (t
Data off
- t
CAS out
)
Issue 2.2 - October 13, 2000
section 6.7.
)
section 6.7.
1T
1T
1T
Note 1
1T
1T
1T
1T
3T
6T
1T
1T
1T
2T
1T
1T
Note 2
1T
1T
1T
2T
1T
1T
1T
3T
1T
1T
1T
1T
Min
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
0
).
1T
Max
17
17
17
17
25
23
Cycles
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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