CLIENT ST Microelectronics, Inc., CLIENT Datasheet - Page 42
CLIENT
Manufacturer Part Number
CLIENT
Description
STPC Client Datasheet / PC Compatible Embeded Microprocessor
Manufacturer
ST Microelectronics, Inc.
Datasheet
1.CLIENT.pdf
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ELECTRICAL SPECIFICATIONS
4.5.7 ISA INTERFACE AC TIMING CHARCTERISTICS
Figure 4-10 ISA Cycle (ref table
Table 4-8. ISA Bus AC Timing
42/61
Note 1; Stands for SMEMR#, SMEMW#, MEMR#, MEMW#, IOR# & IOW#.
Note; The clock has not been represented as it cannot be accuratly represented depending on the ISA Slave mode.
Note; The signal numbering refers to
Note 4; These timings are extracted from simulations and are not garanteed by testing
Name
10
10
2
3
9
4
4
4
4
4
CONTROL (Note 1)
WRITE DATA
READ DATA
Parameter
LA [23:17]
IOCHRDY
LA[23:17] valid before ALE# negated
LA[23:17] valid before MEMR#, MEMW# asserted
SA[19:0] & SBHE valid before ALE# negated
SA[19:0] & SBHE valid before MEMR#, MEMW# asserted
SA[19:0] & SHBE valid before SMEMR#, SMEMW# asserted
SA [19:0]
IOCS16#
MCS16#
10a
10b
10d
10c
3a
3b
AEN
ALE
4
4
4
4
4
4
Memory access to 16 bit ISA Slave
Memory access to 8 bit ISA Slave
Memory access to 16 bit ISA Slave
Memory access to 8 bit ISA Slave
Memory access to 16 bit ISA Slave
Memory access to 8 bit ISA Slave
Valid Address
2
Table 4-10
Valid AENx
Table
3
12
12
13
Issue 2.2 - October 13, 2000
4-8)
9
10
14
18
33
22
61
34
Valid Address, SBHE*
37
41
38
47
15
11
42
48
23
23
25
24
VALID DATA
26
26
Min
5T
5T
5T
1T
2T
2T
2T
2T
55
56
54
V.Dat
57
29
58
59
27
Max
64
28
28
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
Units
Cycle
Cycle
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